Patents by Inventor Tomiyuki Yamada
Tomiyuki Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11822799Abstract: A memory system includes a first volatile memory having an access unit of a first bit width; a second volatile memory having an access unit of the first bit width and having a capacity larger than the first volatile memory; and a controller connected to the first and second volatile memories. The controller allocates a first address space having the first bit width as a unit to the first volatile memory, allocates a second address space having the first bit width as a unit to the second volatile memory, selects at least one of the first and second volatile memories based on a first address indicating a position in a third address space having a second bit width as a unit, calculates a second address in the address space allocated to the selected volatile memory, and accesses a position corresponding to the second address of the selected volatile memory.Type: GrantFiled: March 1, 2022Date of Patent: November 21, 2023Assignee: KIOXIA CORPORATIONInventor: Tomiyuki Yamada
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Publication number: 20230093251Abstract: A memory system includes a first volatile memory having an access unit of a first bit width; a second volatile memory having an access unit of the first bit width and having a capacity larger than the first volatile memory; and a controller connected to the first and second volatile memories. The controller allocates a first address space having the first bit width as a unit to the first volatile memory, allocates a second address space having the first bit width as a unit to the second volatile memory, selects at least one of the first and second volatile memories based on a first address indicating a position in a third address space having a second bit width as a unit, calculates a second address in the address space allocated to the selected volatile memory, and accesses a position corresponding to the second address of the selected volatile memory.Type: ApplicationFiled: March 1, 2022Publication date: March 23, 2023Applicant: Kioxia CorporationInventor: Tomiyuki YAMADA
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Patent number: 11009883Abstract: An operation control system includes: a first detector that detects a transport body that has reached a predetermined reference position on a first transport line; an obstacle sensor and an autonomous traveling control unit provided in each of a plurality of self-propelled carrier bodies traveling on a second transport line; a gate provided on the second transport line; and a gate driving unit that moves the gate to a retracted position when the first detector detects the transport body, and moves the gate to an advanced position when the first detector does not detect the transport body. The autonomous traveling control unit controls the travel of the carrier bodies such that a forward separation distance, a distance between any of the carrier bodies and another carrier body or an obstacle ahead of the carrier body, is equal to or greater than a predetermined collision prevention distance.Type: GrantFiled: September 12, 2019Date of Patent: May 18, 2021Assignee: MAZDA MOTOR CORPORATIONInventors: Yingchuan Chen, Masahiro Fujii, Kenji Honda, Tomiyuki Yamada
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Patent number: 10817186Abstract: According to one embodiment, a memory includes a non-volatile memory, a first buffer, a first circuit, a second circuit, and a third circuit. The first circuit transfers data from a host to the non-volatile memory through the first buffer. The second circuit executes garbage collection through the first buffer. The first buffer includes a second buffer and a third buffer. The second buffer can be allocated to the first and second circuit. The third buffer can be allocated only to the first circuit. The third circuit includes a timer. The third circuit allocates the first buffer to the first circuit or the second circuit upon writing of data in the non-volatile memory from the second buffer. The third circuit, after data is written into the non-volatile memory from the third buffer, allocates the third buffer to the first circuit at timing based on the timer.Type: GrantFiled: March 1, 2018Date of Patent: October 27, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventor: Tomiyuki Yamada
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Publication number: 20200103908Abstract: An operation control system includes: a first detector that detects a transport body that has reached a predetermined reference position on a first transport line; an obstacle sensor and an autonomous traveling control unit provided in each of a plurality of self-propelled carrier bodies traveling on a second transport line; a gate provided on the second transport line; and a gate driving unit that moves the gate to a retracted position when the first detector detects the transport body, and moves the gate to an advanced position when the first detector does not detect the transport body. The autonomous traveling control unit controls the travel of the carrier bodies such that a forward separation distance, a distance between any of the carrier bodies and another carrier body or an obstacle ahead of the carrier body, is equal to or greater than a predetermined collision prevention distance.Type: ApplicationFiled: September 12, 2019Publication date: April 2, 2020Applicant: MAZDA MOTOR CORPORATIONInventors: Yingchuan CHEN, Masahiro FUJII, Kenji HONDA, Tomiyuki YAMADA
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Publication number: 20190073140Abstract: According to one embodiment, a memory includes a non-volatile memory, a first buffer, a first circuit, a second circuit, and a third circuit. The first circuit transfers data from a host to the non-volatile memory through the first buffer. The second circuit executes garbage collection through the first buffer. The first buffer includes a second buffer and a third buffer. The second buffer can be allocated to the first and second circuit. The third buffer can be allocated only to the first circuit. The third circuit includes a timer. The third circuit allocates the first buffer to the first circuit or the second circuit upon writing of data in the non-volatile memory from the second buffer. The third circuit, after data is written into the non-volatile memory from the third buffer, allocates the third buffer to the first circuit at timing based on the timer.Type: ApplicationFiled: March 1, 2018Publication date: March 7, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventor: Tomiyuki YAMADA
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Patent number: 8989664Abstract: When a first module and a second module of a plurality of modules 110 to 150 perform authentication processing through short range communication, the first module detects remaining capacity of its own battery 101. When the remaining capacity surpasses a predetermined level, electric power for use in performing authentication operation is supplied to the second module. The plurality of modules, perform authentication processing through short range communication as mentioned above. In addition, individual function units of the respective modules are activated, whereby one function is implemented as a whole. Such a portable device can be made operable on electrical power of a battery for a long hour without impairing convenience of the device.Type: GrantFiled: November 21, 2011Date of Patent: March 24, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Masanori Okinoi, Takuya Mikami, Mohamed Thaheer Ahmad Shaheer, Tomiyuki Yamada
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Publication number: 20120071099Abstract: When a first module and a second module of a plurality of modules 110 to 150 perform authentication processing through short range communication, the first module detects remaining capacity of its own battery 101. When the remaining capacity surpasses a predetermined level, electric power for use in performing authentication operation is supplied to the second module. The plurality of modules, perform authentication processing through short range communication as mentioned above. In addition, individual function units of the respective modules are activated, whereby one function is implemented as a whole. Such a portable device can be made operable on electrical power of a battery for a long hour without impairing convenience of the device.Type: ApplicationFiled: November 21, 2011Publication date: March 22, 2012Applicant: Panasonic CorporationInventors: Masanori OKINOI, Takuya Mikami, Mohamed Thaheer Ahmad Shaheer, Tomiyuki Yamada
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Publication number: 20100245245Abstract: A spatial input operation display apparatus providing a user interface allowing input operations inside a space without requiring hands or fingers to be stopped in space, and not requiring a physical shape or space.Type: ApplicationFiled: December 10, 2008Publication date: September 30, 2010Applicant: PANASONIC CORPORATIONInventors: Tomiyuki Yamada, Shuichi Takada, Shunsaku Imaki
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Publication number: 20080118074Abstract: A control unit 6 obtains position data from a sensor unit 1 to specify the position of the main body of an apparatus, and also obtains acceleration data from the sensor unit 1 to specify the azimuth along which the main body faces forward. Then, the control unit employs the azimuth data and the position data to calculate distance data and directional data relative to a predesignated or given position, and outputs these data as sound localization data. Based on the sound localization data, a processing unit 7 performs a stereophonic sound process for digital audio data, and generates digital audio data having directivity. A conversion unit 8 converts the digital audio data into analog audio data, and drives loudspeakers 9 and 10 to release stereophonic speech. As a result, using a speech form that is easily understood simply by listening, a direction instruction can be provided for a listener.Type: ApplicationFiled: November 21, 2007Publication date: May 22, 2008Inventors: Shuichi Takada, Shunsaku Imaki, Tomiyuki Yamada, Yasushi Yonamine