Abstract: An electrode structure includes: a plurality of pixel electrodes arranged separately from each other; and a plurality of dielectric layers laminated in a first direction with respect to the plurality of pixel electrodes, in which the plurality of dielectric layers includes: a first dielectric layer that spreads over the plurality of pixel electrodes in a direction intersecting with the first direction; and a second dielectric layer that includes dielectric material having a refractive index higher than that of the first dielectric layer, sandwiches the first dielectric layer together with the plurality of pixel electrodes, and has a slit at a position overlapping space between pixel electrodes adjacent when viewed from the first direction.

Abstract: A semiconductor module according to an embodiment includes a first conductor, a second conductor, a third conductor, a fourth conductor, a plurality of conductive bonding materials, and a plurality of multi-gate semiconductor devices. The multi-gate semiconductor device includes a semiconductor layer, a collector electrode. The multi-gate semiconductor device includes an emitter electrode, a first gate electrode, and a second gate electrode bonded to the second to fourth conductors via conductive bonding materials.

Abstract: A semiconductor test apparatus capable of securely having the contact pin and the external contact terminal held in contact with each other even in case where the vertical type handler is used. The semiconductor test apparatus comprises: a test socket having a socket surface formed thereon, the socket surface having a contact pin towering therefrom; and a semiconductor transport fixture having a concave portion formed thereon, the concave portion adapted to receive therein an IC under test, wherein the test socket has a position adjustment guide provided thereon, the semiconductor transport fixture has a guide through bore formed therein, the guide through bore adapted to receive the position adjustment guide therethrough when the IC under test comes under test, and either one of the position adjustment guide or the guide through bore is formed in a tapered shape.

Abstract: A semiconductor test apparatus capable of securely having the contact pin and the external contact terminal held in contact with each other even in case where the vertical type handler is used. The semiconductor test apparatus comprises: a test socket having a socket surface formed thereon, the socket surface having a contact pin towering therefrom; and a semiconductor transport fixture having a concave portion formed thereon, the concave portion adapted to receive therein an IC under test, wherein the test socket has a position adjustment guide provided thereon, the semiconductor transport fixture has a guide through bore formed therein, the guide through bore adapted to receive the position adjustment guide therethrough when the IC under test comes under test, and either one of the position adjustment guide or the guide through bore is formed in a tapered shape.

Abstract: A novel jig device useful for transporting and testing an IC chip is disclosed. The jig device comprises a main jig body, having a holding part onto which the IC chip to be tested is attracted and held and at least one suction path is formed, and at least one contact probe arranged in the suction path of the main jig body. The main jig body comprises preferably a base part and front head part. The contact probe connects electronically between a terminal of the IC chip held at the holding part and an electrode of circuit board of tester.

Abstract: A novel jig device useful for transporting and testing an IC chip is disclosed. The jig device comprises a main jig body, having a holding part onto which the IC chip to be tested is attracted and held and at least one suction path is formed, and at least one contact probe arranged in the suction path of the main jig body. The main jig body comprises preferably a base part and front head part. The contact probe connects electronically between a terminal of said the IC chip held at the holding part and an electrode of circuit board of tester.