Patents by Inventor Tomoaki Furusho

Tomoaki Furusho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11094835
    Abstract: It is an object of the present invention to provide a silicon carbide substrate having a low defect density that does not contaminate a process device and a silicon carbide semiconductor device including the silicon carbide substrate. A silicon carbide substrate according to the present invention is a silicon carbide substrate including: a substrate inner portion; and a substrate outer portion surrounding the substrate inner portion, wherein non-dopant metal impurity concentration of the substrate inner portion is 1×1016 cm?3 or more, and a region of the substrate outer portion at least on a surface side thereof is a substrate surface region in which the non-dopant metal impurity concentration is less than 1×1016 cm?3.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: August 17, 2021
    Assignees: MITSUBISHI ELECTRIC CORPORATION, NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY
    Inventors: Tomoaki Furusho, Takanori Tanaka, Takeharu Kuroiwa, Toru Ujihara, Shunta Harada, Kenta Murayama
  • Publication number: 20200013907
    Abstract: It is an object of the present invention to provide a silicon carbide substrate having a low defect density that does not contaminate a process device and a silicon carbide semiconductor device including the silicon carbide substrate. A silicon carbide substrate according to the present invention is a silicon carbide substrate including: a substrate inner portion; and a substrate outer portion surrounding the substrate inner portion, wherein non-dopant metal impurity concentration of the substrate inner portion is 1×1016 cm?3 or more, and a region of the substrate outer portion at least on a surface side thereof is a substrate surface region in which the non-dopant metal impurity concentration is less than 1×1016 cm?3.
    Type: Application
    Filed: February 20, 2018
    Publication date: January 9, 2020
    Applicants: Mitsubishi Electric Corporation, NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY
    Inventors: Tomoaki FURUSHO, Takanori TANAKA, Takeharu KUROIWA, Toru UJIHARA, Shunta HARADA, Kenta MURAYAMA
  • Patent number: 8916880
    Abstract: A semiconductor device that can suppress deterioration in crystal quality caused by a lattice mismatch between a substrate and an epitaxial layer and that also can ensure a voltage sustaining performance, and a wafer for forming the semiconductor device. An epitaxial wafer of silicon carbide (SiC), which is used for manufacturing a semiconductor device, includes a low resistance substrate and an epitaxial layer provided thereon. The epitaxial layer is doped with the same dopant as a dopant doped into the substrate, and has a laminated structure including a low concentration layer and an ultrathin high concentration layer. A doping concentration in the low concentration layer is lower than that in the silicon carbide substrate. A doping concentration in the ultrathin high concentration layer is equal to that in the silicon carbide substrate.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 23, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Ohtsuka, Nobuyuki Tomita, Tomoaki Furusho
  • Patent number: 8679952
    Abstract: A method is provided in order to manufacture a silicon carbide epitaxial wafer whose surface flatness is very good and has a very low density of carrot defects and triangular defects arising after epitaxial growth. The silicon carbide epitaxial wafer is manufactured by a first step of annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from <0001> face, in a reducing gas atmosphere at a first temperature T1 for a treatment time t, a second step of reducing the temperature of the substrate in the reducing gas atmosphere, and a third step of performing epitaxial growth at a second temperature T2 below the annealing temperature T1 in the first step, while supplying at least a gas including silicon atoms and a gas including carbon atoms.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: March 25, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuyuki Tomita, Kenichi Hamano, Masayoshi Tarutani, Yoichiro Mitani, Takeharu Kuroiwa, Masayuki Imaizumi, Hiroaki Sumitani, Kenichi Ohtsuka, Tomoaki Furusho, Takao Sawada, Yuji Abe
  • Publication number: 20130126906
    Abstract: A method is provided in order to manufacture a silicon carbide epitaxial wafer whose surface flatness is very good and has a very low density of carrot defects and triangular defects arising after epitaxial growth. The silicon carbide epitaxial wafer is manufactured by a first step of annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from <0001> face, in a reducing gas atmosphere at a first temperature T1 for a treatment time t, a second step of reducing the temperature of the substrate in the reducing gas atmosphere, and a third step of performing epitaxial growth at a second temperature T2 below the annealing temperature T1 in the first step, while supplying at least a gas including silicon atoms and a gas including carbon atoms.
    Type: Application
    Filed: March 18, 2011
    Publication date: May 23, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuyuki Tomita, Kenichi Hamano, Masayoshi Tarutani, Yoichiro Mitani, Takeharu Kuroiwa, Masayuki Imaizumi, Hiroaki Sumitani, Kenichi Ohtsuka, Tomoaki Furusho, Takao Sawada, Yuji Abe
  • Publication number: 20130099253
    Abstract: A semiconductor device that can suppress deterioration in crystal quality caused by a lattice mismatch between a substrate and an epitaxial layer and that also can ensure a voltage sustaining performance, and a wafer for forming the semiconductor device. An epitaxial wafer of silicon carbide (SiC), which is used for manufacturing a semiconductor device, includes a low resistance substrate and an epitaxial layer provided thereon. The epitaxial layer is doped with the same dopant as a dopant doped into the substrate, and has a laminated structure including a low concentration layer and an ultrathin high concentration layer. A doping concentration in the low concentration layer is lower than that in the silicon carbide substrate. A doping concentration in the ultrathin high concentration layer is equal to that in the silicon carbide substrate.
    Type: Application
    Filed: July 14, 2011
    Publication date: April 25, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi Ohtsuka, Nobuyuki Tomita, Tomoaki Furusho