Patents by Inventor Tomoaki Isozaki

Tomoaki Isozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9762244
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: September 12, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Tomoaki Isozaki
  • Publication number: 20150303924
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Application
    Filed: June 30, 2015
    Publication date: October 22, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Tomoaki ISOZAKI
  • Patent number: 9099330
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: August 4, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Tomoaki Isozaki
  • Patent number: 8350593
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: January 8, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Tomoaki Isozaki
  • Publication number: 20110133803
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Application
    Filed: January 27, 2011
    Publication date: June 9, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Tomoaki ISOZAKI
  • Patent number: 7902873
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: March 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tomoaki Isozaki
  • Patent number: 7400134
    Abstract: The integrated circuit device includes a memory chip and a logic chip. The memory chip has memory I/O pads and test pads. The test pads are placed in line at the position outer than memory I/O pads and larger than the memory I/O pads. The logic chip has logic COC I/O pads. The logic COC I/O pads are connected to the memory I/O pads.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: July 15, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Yoshiaki Morishita, Nobuteru Oh, Tomoaki Isozaki
  • Publication number: 20070114571
    Abstract: A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal.
    Type: Application
    Filed: November 20, 2006
    Publication date: May 24, 2007
    Inventor: Tomoaki ISOZAKI
  • Publication number: 20060050454
    Abstract: A chip-on-chip semiconductor device is composed of: a first chip operating on a first power supply voltage; and a second chip operating on a second power supply voltage lower than the first power supply voltage, the first and second chips being flip-chip connected through inter-chip connection bumps. The second chip is designed to provide level-conversion for a transmission signal received from the first chip.
    Type: Application
    Filed: September 6, 2005
    Publication date: March 9, 2006
    Inventors: Kazuhiro Koudate, Tomoaki Isozaki
  • Publication number: 20050156616
    Abstract: The integrated circuit device includes a memory chip and a logic chip. The memory chip has memory I/O pads and test pads. The test pads are placed in line at the position outer than memory I/O pads and larger than the memory I/O pads. The logic chip has logic COC I/O pads. The logic COC I/O pads are connected to the memory I/O pads.
    Type: Application
    Filed: January 19, 2005
    Publication date: July 21, 2005
    Inventors: Yoshiaki Morishita, Nobuteru Oh, Tomoaki Isozaki
  • Patent number: 5292687
    Abstract: A pad is provided outside a pad block. The most appropriate position is determined for the pad which is connected to the pad block. The pad block is arranged to be most appropriate in position relative to the pad, and a coordinate of the pad block is determined to be used for interconnection of internal regions of the pad block.
    Type: Grant
    Filed: February 7, 1992
    Date of Patent: March 8, 1994
    Assignee: NEC Corporation
    Inventor: Tomoaki Isozaki
  • Patent number: 4805508
    Abstract: A sound synthesizing circuit has means for synthesizing sound digital data in a pitch period of a sound to be synthesized and means for producing a sound analog signal according to the synthesized sound digital data. The synthesized sound digital data are sequentially transferred to the producing means according to a sequential sampling pulse. The sequential sampling pulse has a predetermined interval and a corrected interval different from the predetermined interval in one pitch period of a sound to be synthesized. Thus, a sound of good quality with an arbitrary interval can be synthesized in a wide scale by a simple hardware integrated circuit in a small semiconductor chip.
    Type: Grant
    Filed: July 24, 1987
    Date of Patent: February 21, 1989
    Assignee: NEC Corporation
    Inventor: Tomoaki Isozaki