Patents by Inventor Tomoaki Machida

Tomoaki Machida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11612063
    Abstract: An insulating sheet for use in forming an insulating layer of an interconnect substrate includes a semi-cured insulating resin layer, a semi-cured protective resin layer laminated on an upper surface of the insulating resin layer, and a cover layer laminated on an upper surface of the protective resin layer, wherein the protective resin layer has lower resistance to a predetermined solution than the insulating resin layer has, the predetermined solution being capable of dissolving the insulating resin layer and/or the protective resin layer.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: March 21, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tomoaki Machida
  • Patent number: 11594478
    Abstract: A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: February 28, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tomoaki Machida
  • Publication number: 20220046805
    Abstract: An insulating sheet for use in forming an insulating layer of an interconnect substrate includes a semi-cured insulating resin layer, a semi-cured protective resin layer laminated on an upper surface of the insulating resin layer, and a cover layer laminated on an upper surface of the protective resin layer, wherein the protective resin layer has lower resistance to a predetermined solution than the insulating resin layer has, the predetermined solution being capable of dissolving the insulating resin layer and/or the protective resin layer.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 10, 2022
    Inventor: Tomoaki MACHIDA
  • Publication number: 20220044990
    Abstract: A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.
    Type: Application
    Filed: October 8, 2021
    Publication date: February 10, 2022
    Inventor: Tomoaki Machida
  • Patent number: 11171081
    Abstract: A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 9, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tomoaki Machida
  • Publication number: 20200303293
    Abstract: A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 24, 2020
    Inventor: Tomoaki Machida