Abstract: A pneumatic tire with further improved tire performance on snow and ice. A center block row 30 is formed to a tread portion 16, with second block rows 32A, 32B formed adjacent at each side on the tire width direction outside of the center block row 30. Central lug grooves 24P, 24Q are formed in the center block row 30 so as to have mutually different inclination directions with respect to the tire width direction. End portions 25P at the ground contact rear end side of the central lug grooves 24Q during tire forward rotation are positioned in blocks 33B of the second block row 32B, and end portions 25Q of the ground contact rear end side of the central lug grooves 24P are positioned in blocks 33A of the second block row 32A.

Abstract: A pneumatic tire comprising: a pair of center circumferential direction grooves, first lug grooves that connect to the center circumferential direction grooves and the directions of inclination of which is alternately in opposite directions in the tire circumferential direction, second lug grooves that extend from the center circumferential direction grooves to the edges of the tread and the directions of inclination are in opposite directions on one side and the other side across the equator in the tire width direction, a pair of shoulder circumferential direction grooves that delineate second blocks with the center circumferential direction grooves and the second lug grooves, and sub-grooves that traverse the second blocks in the tire circumferential direction to connect the second lug grooves, and extend in a direction that is orthogonal to the direction of inclination of the second lug grooves.

Abstract: A material for an optical circuit-electrical circuit mixedly mounting substrate comprises a light permeable resin layer, and an optical circuit forming layer that is made of a light permeable resin of which refractive index increases (or decreases) when irradiated with an activating energy beam and is disposed adjacent to the light permeable resin layer, wherein a refractive index of a portion of the optical circuit forming layer is higher (or lower) than that of the light permeable resin layer when the material for the optical circuit-electrical circuit mixedly mounting substrate is irradiated with an activating energy beam so that said portion is irradiated.

Abstract: Disclosed is a pneumatic tire capable of improving traction performance, braking performance, and cornering performance on snow.

Abstract: A pneumatic tire with further improved tire performance on snow and ice. A center block row 30 is formed to a tread portion 16, with second block rows 32A, 32B formed adjacent at each side on the tire width direction outside of the center block row 30. Central lug grooves 24P, 24Q are formed in the center block row 30 so as to have mutually different inclination directions with respect to the tire width direction. End portions 25P at the ground contact rear end side of the central lug grooves 24Q during tire forward rotation are positioned in blocks 33B of the second block row 32B, and end portions 25Q of the ground contact rear end side of the central lug grooves 24P are positioned in blocks 33A of the second block row 32A.

Abstract: A material for an optical circuit-electrical circuit mixedly mounting substrate comprises a light permeable resin layer, and an optical circuit forming layer that is made of a light permeable resin of which refractive index increases (or decreases) when irradiated with an activating energy beam and is disposed adjacent to the light permeable resin layer, wherein a refractive index of a portion of the optical circuit forming layer is higher (or lower) than that of the light permeable resin layer when the material for the optical circuit-electrical circuit mixedly mounting substrate is irradiated with an activating energy beam so that said portion is irradiated.

Abstract: A material for an optical circuit-electrical circuit mixedly mounting substrate comprises a light permeable resin layer, and an optical circuit forming layer that is made of a light permeable resin of which refractive index increases (or decreases) when irradiated with an activating energy beam and is disposed adjacent to the light permeable resin layer, wherein a refractive index of a portion of the optical circuit forming layer is higher (or lower) than that of the light permeable resin layer when the material for the optical circuit-electrical circuit mixedly mounting substrate is irradiated with an activating energy beam so that said portion is irradiated.

Abstract: A material for an optical circuit-electrical circuit mixedly mounting substrate comprises a light permeable resin layer, and an optical circuit forming layer that is made of a light permeable resin of which refractive index increases (or decreases) when irradiated with an activating energy beam and is disposed adjacent to the light permeable resin layer, wherein a refractive index of a portion of the optical circuit forming layer is higher (or lower) than that of the light permeable resin layer when the material for the optical circuit-electrical circuit mixedly mounting substrate is irradiated with an activating energy beam so that said portion is irradiated.

Abstract: A material for an optical circuit-electrical circuit mixedly mounting substrate comprises a light permeable resin layer, and an optical circuit forming layer that is made of a light permeable resin of which refractive index increases (or decreases) when irradiated with an activating energy beam and is disposed adjacent to the light permeable resin layer, wherein a refractive index of a portion of the optical circuit forming layer is higher (or lower) than that of the light permeable resin layer when the material for the optical circuit-electrical circuit mixedly mounting substrate is irradiated with an activating energy beam so that said portion is irradiated.

Abstract: A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

Abstract: A process for fabricating a chip package structure is disclosed. To fabricate the chip package structure, a carrier and a plurality of chips are provided. Each chip has an active surface and at least one of the active surfaces has a plurality of bumps thereon. The chips and the carrier are electrically connected together. Thereafter, a heat sink is attached to the back of the chips and then at least one heat-resistant buffering film is formed over part of the heat sink surface. An encapsulating material layer is formed over the carrier and filling bonding gaps between the chips and the carrier. The encapsulating material within the bonding gaps has a thickness. The maximum diameter of particles constituting the encapsulating material layer is less than half of the said thickness.

Abstract: A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

Abstract: A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is flip-chip bonded and electrically connected to the carrier or another chip. There is a flip-chip bonding gap between the chip and the carrier or other chips. A heat sink is positioned on the uppermost chip. The encapsulating material layer fills the flip-chip bonding gap as well as a gap between the uppermost chip and the heat sink. A part of the surface of the heat sink away from the upper-most chip is exposed. Furthermore, the encapsulating material layer is formed in a simultaneous molding process. For example, the chip is separated from the heat sink by a distance between 0.03˜0.2 mm, and the encapsulating material has a thermal conductivity greater than 1.2 W/m.K.

Abstract: A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is bonded and electrically connected to the carrier or another chip using a flip-chip bonding technique. A flip-chip bonding gap is set up between the chip and he carrier or other chips. The heat sink is set up over the top chip. The heat sink has an area bigger than the chip. The encapsulating material layer fills up the flip-chip bonding gap and covers the carrier as well as the heat sink. The encapsulating material layer is formed in a simultaneous molding process and has a thermal conductivity more than 1.2 W/m.K. Furthermore, a plurality of standoff components may be selectively positioned on the heat sink.

Abstract: A material for an optical circuit-electrical circuit mixedly mounting substrate comprises a light permeable resin layer, and an optical circuit forming layer that is made of a light permeable resin of which refractive index increases (or decreases) when irradiated with an activating energy beam and is disposed adjacent to the light permeable resin layer, wherein a refractive index of a portion of the optical circuit forming layer is higher (or lower) than that of the light permeable resin layer when the material for the optical circuit-electrical circuit mixedly mounting substrate is irradiated with an activating energy beam so that said portion is irradiated.

Abstract: A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

Abstract: A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is flip-chip bonded and electrically connected to the carrier or another chip. There is a flip-chip bonding gap between the chip and the carrier or other chips. A heat sink is positioned on the uppermost chip. The encapsulating material layer fills the flip-chip bonding gap as well as a gap between the uppermost chip and the heat sink. A part of the surface of the heat sink away from the upper-most chip is exposed. Furthermore, the encapsulating material layer is formed in a simultaneous molding process. For example, the chip is separated from the heat sink by a distance between 0.03˜0.2 mm, and the encapsulating material has a thermal conductivity greater than 1.2 W/m.K.

Abstract: A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is bonded and electrically connected to the carrier or another chip using a flip-chip bonding technique. A flip-chip bonding gap is set up between the chip and he carrier or other chips. The heat sink is set up over the top chip. The heat sink has an area bigger than the chip. The encapsulating material layer fills up the flip-chip bonding gap and covers the carrier as well as the heat sink. The encapsulating material layer is formed in a simultaneous molding process and has a thermal conductivity more than 1.2 W/m.K. Furthermore, a plurality of standoff components may be selectively positioned on the heat sink.

Abstract: A chip package structure and a process for fabricating the same is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. To fabricate the chip package structure, a carrier and a plurality of chips are provided. Each chip has an active surface and at least one of the active surfaces has a plurality of bumps thereon. The chips and the carrier are electrically connected together. Thereafter, a heat sink is attached to the back of the chips and then at least one heat-resistant buffering film is formed over part of the heat sink surface. An encapsulating material layer is formed over the carrier and filling bonding gaps between the chips and the carrier. The encapsulating material within the bonding gaps has a thickness. The maximum diameter of particles constituting the encapsulating material layer is less than half of the said thickness.