Patents by Inventor Tomoaki Shimotsu

Tomoaki Shimotsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optical modules and methods of making the optical modules
    Patent number: 6979810
    Abstract: A sample & hold type phase detector is used in a CDR IC and, in jitter transfer bandwidth adjustment, VCO output waveforms 90° out of phase with each other can be inputted to the phase detector, whereby a jitter transfer bandwidth can be calculated by only the measurement of frequency and of a DC voltage and it is possible to make a jitter transfer bandwidth adjustment in DC test for IC.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: December 27, 2005
    Assignee: OpNext Japan, Inc.
    Inventors: Norio Chujo, Keiichi Yamamoto, Akio Osaki, Katsunori Hirano, Takayuki Nakao, Tomoaki Shimotsu, Atsushi Hasegawa, Tetsuya Aoki, Takeshi Yamashita
  • Optical modules and methods of making the optical modules
    Publication number: 20040067068
    Abstract: A sample & hold type phase detector is used in a CDR IC and, in jitter transfer bandwidth adjustment, VCO output waveforms 90° out of phase with each other can be inputted to the phase detector, whereby a jitter transfer bandwidth can be calculated by only the measurement of frequency and of a DC voltage and it is possible to make a jitter transfer bandwidth adjustment in DC test for IC.
    Type: Application
    Filed: August 15, 2001
    Publication date: April 8, 2004
    Inventors: Norio Chujo, Keiichi Yamamoto, Akio Osaki, Katsunori Hirano, Takayuki Nakao, Tomoaki Shimotsu, Atsushi Hasegawa, Tetsuya Aoki, Takeshi Yamashita
  • Temperature compensating circuit, temperature compensating logarithm conversion circuit and light receiver
    Publication number: 20040004179
    Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.
    Type: Application
    Filed: June 24, 2003
    Publication date: January 8, 2004
    Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi
  • Temperature compensating circuit, temperature compensating logarithm conversion circuit and light receiver
    Patent number: 6603110
    Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: August 5, 2003
    Assignees: Hitachi, Ltd., Hitachi Communication System, Inc., Hitachi Video and Information System, Inc.
    Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi
  • Optical module testing method and testing system
    Publication number: 20030081278
    Abstract: While modules to be tested in one constant temperature oven are tested by providing a plurality of constant temperature ovens, accommodating a plurality of modules to be tested in each constant temperature oven and connecting the modules to be tested accommodated in a plurality of constant temperature ovens to the measuring instruments via the switches, preparation for testing such as temperature change of the other constant temperature oven is conducted and the modules to be tested in one constant temperature oven are tested using measuring instruments. Thereafter, the switches are changed over and the modules to be tested accommodated in the other constant temperature oven are tested. Thereby, expensive measuring instruments can be used effectively.
    Type: Application
    Filed: April 2, 2002
    Publication date: May 1, 2003
    Applicant: OpNext Japan, Inc.
    Inventors: Norio Chujo, Kosuke Inoue, Tomoaki Shimotsu, Atsushi Hasegawa, Takeshi Yamashita, Hideyuki Kuwano, Ryozo Sato, Katsumi Uchida, Ikuo Kawaguchi, Kyouichi Yamamoto, Takashi Minato
  • Temperature compensating circuit, temperature compensating logarithm conversion circuit and light receiver
    Publication number: 20030029991
    Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.
    Type: Application
    Filed: June 27, 2002
    Publication date: February 13, 2003
    Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi
  • Temperature compensating circuit, temperature compensating logarithm conversion circuit and light receiver
    Patent number: 6426495
    Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 30, 2002
    Assignees: Hitachi, Ltd., Hitachi Communication System, Inc., Hitachi Video and Information System, Inc.
    Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi