Patents by Inventor Tomoaki Shinoda

Tomoaki Shinoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154007
    Abstract: A semiconductor device includes: a semiconductor layer; trenches that are formed in the semiconductor layer, extend in first direction, and are spaced apart from each other in second direction, the trenches including a first trench located at outermost side in the second direction, and a second trench adjacent to the first trench; an insulating layer formed on the semiconductor layer and within the trenches; a source electrode formed on the insulating layer; a first buried electrode buried in the first trench; a second buried electrode buried above the first buried electrode in the first trench via the insulating layer; and a contact electrode arranged between two adjacent trenches of the plurality of trenches and connecting the source electrode and the semiconductor layer, wherein the second buried electrode has an upper end in contact with the source electrode and a lower end located below a lower end of the contact electrode.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 9, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Tomoaki SHINODA
  • Publication number: 20240105835
    Abstract: A semiconductor device is provided with: a plurality of gate trenches; a plurality of gate electrodes; a plurality of field plate electrodes; gate wiring that is connected to each gate electrode and forms a loop in plan view; first source wiring that is connected to a first end of each field plate electrode and is disposed within the loop of the gate wiring in plan view; second source wiring that is connected to a second end of each field plate electrode and is disposed outside the loop of the gate wiring in plan view; and, a connection structure. The connection structure includes a connection trench that intersects the gate wiring in plan view, and inter-source wiring embedded in the connection trench. The inter-source wiring electrically connects the first source wiring and the second source wiring.
    Type: Application
    Filed: December 12, 2023
    Publication date: March 28, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Tomoaki SHINODA
  • Patent number: 11664448
    Abstract: A semiconductor device includes: a semiconductor chip; and a field effect transistor formed on the semiconductor chip and including a plurality of unit cells, which include at least one first unit cell including a first on-resistance component and a first feedback capacitance component, and at least one second unit cell including a second on-resistance component forming a parallel component with respect to the first on-resistance component and exceeding the first on-resistance component and a second feedback capacitance component forming a parallel component with respect to the first feedback capacitance component and being less than the first feedback capacitance component.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: May 30, 2023
    Assignee: ROHM Co., Ltd.
    Inventors: Tomoaki Shinoda, Hajime Kataoka
  • Publication number: 20210367071
    Abstract: A semiconductor device includes: a semiconductor chip; and a field effect transistor formed on the semiconductor chip and including a plurality of unit cells, which include at least one first unit cell including a first on-resistance component and a first feedback capacitance component, and at least one second unit cell including a second on-resistance component forming a parallel component with respect to the first on-resistance component and exceeding the first on-resistance component and a second feedback capacitance component forming a parallel component with respect to the first feedback capacitance component and being less than the first feedback capacitance component.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 25, 2021
    Inventors: Tomoaki SHINODA, Hajime KATAOKA
  • Patent number: 6520075
    Abstract: A high precision, all-purpose, double action hydraulic press, which can control the speed, position, and parallelism of each slide, can conduct mold exchanges easily, and prevent the breakthrough phenomenon is provided with an outer slide 4, an inner slide 6, drive cylinders 8 and 9 which drive each of the slides, position detection devices 14 and 15 which detect the position of each of the slides, push pins 13, a damper cylinder 10 which prevents breakthrough phenomenon, and a die plate 5 which is equipped with push pins 13. By controlling the flow in the hydraulic pressure circuit which is connected to each of the drive cylinders, the speed, position, and parallelism of each of the slides are controlled.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: February 18, 2003
    Assignee: Aida Engineering Co., Ltd.
    Inventors: Tomoaki Shinoda, Hiroshi Hosoya, Hisashi Morimoto