Patents by Inventor Tomofumi Nakamura

Tomofumi Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210302426
    Abstract: An object of the present invention is to provide an immunological detection method comprising carrying out an immunoreaction using an antibody to Mycoplasma pneumoniae protein P30, in which Mycoplasma pneumoniae is detected with high sensitivity. Provided is an immunological detection method for Mycoplasma pneumoniae using an antibody to Mycoplasma pneumoniae protein P30, the method comprising carrying out an immunoreaction in the presence of a polyoxyethylene alkyl amine. The immunological detection method that uses immunochromatography is also provided.
    Type: Application
    Filed: August 5, 2019
    Publication date: September 30, 2021
    Applicant: SEKISUI MEDICAL CO., LTD.
    Inventors: Yasushi OCHIAI, Tomofumi NAKAMURA
  • Patent number: 10951194
    Abstract: A filter body includes a serial arm and one or more parallel resonators in a state where they are connected in a ladder shape. The serial arm includes a plurality of serial resonators connected in series to each other. A difference of resonance frequencies among the plurality of serial resonators is smaller than a half of a difference between the resonance frequency and an antiresonance frequency of each serial resonator. The serial arm includes a first divided arm which extends from one side toward the other side in a predetermined direction on the piezoelectric substrate, and a second divided arm which is folded back from the other side of the first divided arm and extends toward the one side. The shield conductor includes a portion which is located between at least one of the serial resonators included in the first divided arm and at least one of the serial resonators included in the second divided arm.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: March 16, 2021
    Assignee: KYOCERA Corporation
    Inventors: Motoki Ito, Shigehiko Nagamine, Tomofumi Nakamura
  • Publication number: 20210006227
    Abstract: A filter body includes a serial arm and one or more parallel resonators in a state where they are connected in a ladder shape. The serial arm includes a plurality of serial resonators connected in series to each other. A difference of resonance frequencies among the plurality of serial resonators is smaller than a half of a difference between the resonance frequency and an antiresonance frequency of each serial resonator. The serial arm includes a first divided arm which extends from one side toward the other side in a predetermined direction on the piezoelectric substrate, and a second divided arm which is folded back from the other side of the first divided arm and extends toward the one side. The shield conductor includes a portion which is located between at least one of the serial resonators included in the first divided arm and at least one of the serial resonators included in the second divided arm.
    Type: Application
    Filed: December 17, 2018
    Publication date: January 7, 2021
    Inventors: Motoki ITO, Shigehiko NAGAMINE, Tomofumi NAKAMURA
  • Patent number: 9199837
    Abstract: In an acoustic sensor, a diaphragm arranged on an upper side of a silicon substrate includes a back chamber, and an anchor supports the diaphragm. An insulating plate portion fixed to an upper surface of the silicon substrate covers the diaphragm with a gap. A conductive fixed electrode film arranged on a lower surface of the plate portion configures a back plate. The change in electrostatic capacitance between the fixed electrode film and the diaphragm outputs to the outside from a fixed side electrode pad and a movable side electrode pad as an electric signal. A protective film is arranged continuously with the plate portion at an outer periphery of the plate portion. The protective film covers the outer peripheral part of the upper surface of the silicon substrate, and the outer periphery of the protective film coincides with the outer periphery of the upper surface of the silicon substrate.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: December 1, 2015
    Assignee: OMRON Corporation
    Inventors: Takashi Kasai, Nobuyuki Iida, Tomofumi Nakamura
  • Publication number: 20110278683
    Abstract: In an acoustic sensor, a diaphragm arranged on an upper side of a silicon substrate includes a back chamber, and an anchor supports the diaphragm. An insulating plate portion fixed to an upper surface of the silicon substrate covers the diaphragm with a gap. A conductive fixed electrode film arranged on a lower surface of the plate portion configures a back plate. The change in electrostatic capacitance between the fixed electrode film and the diaphragm outputs to the outside from a fixed side electrode pad and a movable side electrode pad as an electric signal. A protective film is arranged continuously with the plate portion at an outer periphery of the plate portion. The protective film covers the outer peripheral part of the upper surface of the silicon substrate, and the outer periphery of the protective film coincides with the outer periphery of the upper surface of the silicon substrate.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 17, 2011
    Applicant: OMRON CORPORATION
    Inventors: Takashi Kasai, Nobuyuki Iida, Tomofumi Nakamura
  • Patent number: 6635969
    Abstract: A semiconductor device having a chip-on-chip structure including a first semiconductor chip having a connecting member formed on its surface, and a second semiconductor chip overlapped with and joined to the surface of the first semiconductor chip and having a connecting member adhering to the connecting member in the first semiconductor chip on its surface opposite to the first semiconductor chip. An inter-chip sealing layer is provided between the first semiconductor chip and the second semiconductor chip. The connecting members may be respectively bumps formed in a raised state on the surfaces of the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: October 21, 2003
    Assignee: Rohm Co., Ltd.
    Inventor: Tomofumi Nakamura
  • Patent number: 6355977
    Abstract: A semiconductor chip which is joined to a surface of a solid such as a semiconductor chip or a wiring board. The semiconductor chip includes a surface protective film formed on its surface opposite to the surface of the solid, a connecting member formed on the surface protective film for electrically connecting the semiconductor chip and the solid to each other, and surface wiring for connecting internal wiring under the surface protective film and the connecting member to each other.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: March 12, 2002
    Assignee: Rohm, Co., Ltd.
    Inventor: Tomofumi Nakamura
  • Patent number: 5948162
    Abstract: An epitaxially grown layer having a large area and an uniform thickness is formed on an insulating layer. The surface of a silicon substrate (2) is oxidized to form a silicon dioxide layer (4) acting as insulating layer. The silicon dioxide layer (4) is then provided with an opening (10) by etching with the aid of resist (6). After removing the resist (6), a silicon seed crystal layer (11) is selectively grown in the opening (10). Next, the silicon dioxide layer (4) is subjected to etchback using hydrofluoric acid, so that the side face (14) of the seed crystal layer (11) is emerged. The following epitaxial growth on the basis of the seed crystal layer (11) is allowed sufficient growth in the lateral direction. As a result, an epitaxially grown layer having (16) a large area and an uniform thickness is realized.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: September 7, 1999
    Assignee: Rohm Co., Ltd.
    Inventor: Tomofumi Nakamura
  • Patent number: 5417180
    Abstract: An epitaxially grown layer having a large area and an uniform thickness is formed on an insulating layer. The surface of a silicon substrate (2) is oxidized to form a silicon dioxide layer (4) acting as insulating layer. The silicon dioxide layer (4) is then provided with an opening (10) by etching with the aid of resist (6). After removing the resist (6), a silicon seed crystal layer (11) is selectively grown in the opening (10). Next, the silicon dioxide layer (4) is subjected to etchback using hydrofluoric acid, so that the side face (14) of the seed crystal layer (11) is emerged. The following epitaxial growth on the basis of the seed crystal layer (11) is allowed sufficient growth in the lateral direction. As a result, an epitaxially grown layer having (16) a large area and an uniform thickness is realized.
    Type: Grant
    Filed: July 29, 1993
    Date of Patent: May 23, 1995
    Assignee: Rohm Co., Ltd.
    Inventor: Tomofumi Nakamura
  • Patent number: 5219079
    Abstract: A wafer jig which can relieve a decline in precision of wafer processing is provided. Wafers (30) under processing are placed on supporting plates (6) and, in this condition, set into a heating furnace. This condition allows any possible warp of wafer due to its own weight to be eliminated. Further, particles (dust) contaminating the back side of the wafer (30) do not fall onto a processing surface of another wafer (30) thereunder. Moreover, the wafer (30) is placed in such a way that it is isolated from pillars (4) by a distance (L2) and, for this reason, gas flow disturbance which occurs in the vicinity of pillars does not lower the precision of wafer processing. In addition, a slit (7) which is provided for the supporting plate (6) facilitates wafer conveyance.
    Type: Grant
    Filed: April 24, 1992
    Date of Patent: June 15, 1993
    Assignee: Rohm Co., Ltd.
    Inventor: Tomofumi Nakamura
  • Patent number: 5208167
    Abstract: A method for producing a SOI substrate comprising: a step of forming a first opening to an insulating film on a semiconductor substrate and then forming semiconductor crystal layer by epitaxial growth over the first opening and the insulating film; a step of forming a second opening by partially removing the semiconductor crystal layer; a step of forming an integrated insulating film, and a step of forming an integrated semiconductor crystal layer. With the present invention, a semiconductor crystal layer can be formed on an insulating film on a substrate with large area, wherein the crystal layer and the substrate is completely insulated from each other. Further even from such materials as hard to form monocrystal substrate, a substrate can be easily obtained.
    Type: Grant
    Filed: June 19, 1992
    Date of Patent: May 4, 1993
    Assignee: Rohm Co., Ltd.
    Inventor: Tomofumi Nakamura