Patents by Inventor Tomohide Soejima

Tomohide Soejima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FET oscillator exhibiting negative resistance due to high impedance at the source of an FET thereof
    Patent number: 4630003
    Abstract: An FET oscillator wherein a bias circuit is connected to a drain of a field-effect transistor and a source circuit including a transmission line and a self-bias circuit is connected to a source of the transistor, so that the source is substantially open-circuited at an oscillation frequency and the field-effect transistor operates as a two-terminal (the gate and drain) element exhibiting a negative resistance, and wherein a resonant circuit is connected to the gate of the transistor. With the source circuit connected to the transistor source, the oscillator can have a high unloaded Q-value of Qo and a high externally-loaded Q-value of Q.sub.ext, whereby the oscillation frequency is stable. According to this oscillator, only a single bias circuit for the drain is required without the need of a bias circuit for the gate.
    Type: Grant
    Filed: August 19, 1985
    Date of Patent: December 16, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hideki Torizuka, Tomohide Soejima, Shigekazu Hori
  • FET Oscillator exhibiting negative resistance due to high impedance at the source of an FET thereof
    Patent number: 4547750
    Abstract: An FET oscillator wherein a bias circuit is connected to a drain of a field-effect transistor and a source circuit including a transmission line and a self-bias circuit is connected to a source of the transistor, so that the source is substantially open-circuited at an oscillation frequency and the field-effect transistor operates as a two-terminal (the gate and drain) element exhibiting a negative resistance, and wherein a resonant circuit is connected to the gate of the transistor. With the source circuit connected to the transistor source, the oscillator can have a high unloaded Q-value of Qo and a high externally-loaded Q-value of Q.sub.ext, whereby the oscillation frequency is stable. According to this oscillator, only a single bias circuit for the drain is required without the need of a bias circuit for the gate.
    Type: Grant
    Filed: January 18, 1983
    Date of Patent: October 15, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hideki Torizuka, Tomohide Soejima, Shigekazu Hori