Patents by Inventor Tomohiko ASATSUMA

Tomohiko ASATSUMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973096
    Abstract: The present technology relates to a solid-state imaging element, a solid-state imaging element package, and electronic equipment that can suppress occurrence of flares. The solid-state imaging element includes an effective pixel region and a peripheral circuit region. The effective pixel region includes a plurality of pixels arranged two-dimensionally in a matrix pattern. The peripheral circuit region is provided around the effective pixel region. The effective pixel region has a pixel-to-pixel light-shielding film formed at boundary portions between the pixels. In a region on a substrate where a rib structure is formed within the peripheral circuit region, no light-shielding film is formed in the same layer as the pixel-to-pixel light-shielding film. The present technology is applicable, for example, to a solid-state imaging element package including a cover glass that protects a light-receiving surface of the solid-state imaging element.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: April 30, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoko Iida, Tomohiko Asatsuma
  • Patent number: 11902679
    Abstract: An imaging element according to an embodiment includes: a unit pixel including a first pixel having a first photoelectric conversion element and including a second pixel having a second photoelectric conversion element, the second pixel being arranged adjacent to the first pixel; and an accumulation portion that accumulates a charge generated by the second photoelectric conversion element and converts the accumulated charge into a voltage. The accumulation portion is disposed at a boundary between the unit pixel and another unit pixel adjacent to the unit pixel.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: February 13, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomohiko Asatsuma, Ryosuke Nakamura, Satoko Iida, Koshi Okita
  • Patent number: 11855108
    Abstract: A solid-state imaging element which detects visible light and ultraviolet light in one pixel provides improved resolution. First and second photoelectric conversion elements each perform photoelectric conversion of incident light. A first accumulation part accumulates electric charges that are photoelectrically converted by the first photoelectric conversion element second accumulation part is disposed on one face of a substrate and accumulates electric charges that are photoelectrically converted by the second photoelectric conversion element. A connection part is connected to the second accumulation part and transfers the electric charges accumulated in the second accumulation part to another face of the substrate.
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: December 26, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoko Iida, Yoshiaki Kitano, Kengo Nagata, Toshiaki Ono, Tomohiko Asatsuma
  • Publication number: 20230254602
    Abstract: An imaging element according to an embodiment includes: a unit pixel including a first pixel having a first photoelectric conversion element and including a second pixel having a second photoelectric conversion element, the second pixel being arranged adjacent to the first pixel; and an accumulation portion that accumulates a charge generated by the second photoelectric conversion element and converts the accumulated charge into a voltage. The accumulation portion is disposed at a boundary between the unit pixel and another unit pixel adjacent to the unit pixel.
    Type: Application
    Filed: April 13, 2023
    Publication date: August 10, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomohiko ASATSUMA, Ryosuke NAKAMURA, Satoko IIDA, Koshi OKITA
  • Publication number: 20230124400
    Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit, where the overflow path transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that r
    Type: Application
    Filed: October 27, 2022
    Publication date: April 20, 2023
    Inventors: TOMOHIKO ASATSUMA, MINORU ISHIDA
  • Patent number: 11563050
    Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit and transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that reduces light to enter
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: January 24, 2023
    Assignee: SONY CORPORATION
    Inventors: Tomohiko Asatsuma, Minoru Ishida
  • Publication number: 20230018370
    Abstract: An imaging element according to an embodiment includes: a unit pixel including a first pixel having a first photoelectric conversion element and including a second pixel having a second photoelectric conversion element, the second pixel being arranged adjacent to the first pixel; and an accumulation portion that accumulates a charge generated by the second photoelectric conversion element and converts the accumulated charge into a voltage. The accumulation portion is disposed at a boundary between the unit pixel and another unit pixel adjacent to the unit pixel.
    Type: Application
    Filed: December 8, 2020
    Publication date: January 19, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomohiko ASATSUMA, Ryosuke NAKAMURA, Satoko IIDA, Koshi OKITA
  • Patent number: 11527568
    Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit and transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that reduces light to enter
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: December 13, 2022
    Assignee: SONY CORPORATION
    Inventors: Tomohiko Asatsuma, Minoru Ishida
  • Patent number: 11509842
    Abstract: Provided is a solid-state imaging element configured to automatically extend dynamic range for each unit pixel. A solid-state imaging element includes, for a unit pixel, a first photoelectric conversion element, a first accumulation portion that accumulates electric charge obtained by photoelectric conversion by the first photoelectric conversion element, and a first film that is electrically connected to the first accumulation portion and has an optical characteristic changing according to applied voltage. Furthermore, the unit pixel of the solid-state imaging element can further include a first transfer transistor that transfers electric charge obtained by photoelectric conversion by the photoelectric conversion element to the first accumulation portion, an amplification transistor that is electrically connected to the first accumulation portion, and a selection transistor that is electrically connected to the amplification transistor.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: November 22, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Toshiaki Ono, Satoko Iida, Tomohiko Asatsuma, Yoshiaki Kitano, Yusuke Matsumura, Ryoko Kajikawa
  • Patent number: 11482549
    Abstract: A solid-state imaging device includes an imaging element group in which imaging elements each having a photoelectric conversion portion 10 formed on or above a semiconductor substrate 70 and further having a wire grid polarizer 91 and an on-chip microlens 15 are arrayed in a two-dimensional matrix, and a first interlayer insulating layer 83 and a second interlayer insulating layer 84 provided on a light incident side of the photoelectric conversion portions 10. The wire grid polarizer 91 is provided between the first interlayer insulating layer 83 and the second interlayer insulating layer 84, and the on-chip microlens 15 is provided on the second interlayer insulating layer 84. The first interlayer insulating layer 83 and the second interlayer insulating layer 84 include an oxide material or a resin material, and the on-chip microlens includes SiN or SiON.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: October 25, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Takeshi Yanagita, Tomohiko Asatsuma
  • Publication number: 20220102400
    Abstract: A high degree of phase difference detection accuracy can be obtained using a phase difference pixel with a simpler configuration. A solid-state image-capturing device includes a pixel array unit in which a plurality of pixels including a phase difference pixel which is a pixel for focal point detection and an image-capturing pixel which is a pixel for image generation are arranged in a two-dimensional array. In this case, a predetermined layer between a light shielding layer and a micro lens formed in the image-capturing pixel has a higher refraction index than a refraction index of the predetermined layer formed in the phase difference pixel. The technique of the present disclosure can be applied to, for example, a back-illuminated-type solid-state image-capturing device and the like.
    Type: Application
    Filed: July 8, 2021
    Publication date: March 31, 2022
    Applicant: SONY GROUP CORPORATION
    Inventor: Tomohiko ASATSUMA
  • Publication number: 20220085092
    Abstract: There is provided an imaging device capable of further improving image quality of a subject, particularly a lesion portion such as cancer. There is provided an imaging device including: a first substrate including a first pixel array unit in which a plurality of pixels having at least a first photoelectric conversion unit is arranged in a two-dimensional manner, a first wiring layer, and a first support layer stacked in this order; and a second substrate including a second pixel array unit in which a plurality of pixels having at least a second photoelectric conversion unit is arranged in a two-dimensional manner, a second wiring layer, and a second support layer stacked in this order, in which the first support layer and the second support layer are bonded to each other to form a stacked structure, and at least one of the support layers includes an antireflection layer.
    Type: Application
    Filed: December 19, 2019
    Publication date: March 17, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiaki MASUDA, Tomohiko ASATSUMA
  • Publication number: 20220077212
    Abstract: To provide a solid-state imaging device that can realize further improvement in image quality. Provided is a solid-state imaging device including: a pixel array unit in which pixels having at least a photoelectric conversion unit configured to perform photoelectric conversion are arranged two-dimensionally; a rib formed in an outer peripheral portion outside the pixel array unit and extending above the pixel array unit; a light-shielding material arranged at least in an outer peripheral portion outside the pixel array unit and further arranged below the rib; and a low-reflection material formed so as to cover at least a part of the light-shielding material. The low-reflection material is formed below the rib, on a side of the rib, or below the rib, and on a side of the rib.
    Type: Application
    Filed: December 27, 2019
    Publication date: March 10, 2022
    Inventors: MASASHI TAKAMI, TETSUHIRO IWASHITA, TOMOHIKO ASATSUMA
  • Patent number: 11211410
    Abstract: A high degree of phase difference detection accuracy can be obtained using a phase difference pixel with a simpler configuration. A solid-state image-capturing device includes a pixel array unit in which a plurality of pixels including a phase difference pixel which is a pixel for focal point detection and an image-capturing pixel which is a pixel for image generation are arranged in a two-dimensional array. In this case, a predetermined layer between a light shielding layer and a micro lens formed in the image-capturing pixel has a higher refraction index than a refraction index of the predetermined layer formed in the phase difference pixel. The technique of the present disclosure can be applied to, for example, a back-illuminated-type solid-state image-capturing device and the like.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: December 28, 2021
    Assignee: SONY CORPORATION
    Inventor: Tomohiko Asatsuma
  • Publication number: 20210366961
    Abstract: A solid-state imaging device includes an imaging element group in which imaging elements each having a photoelectric conversion portion 10 formed on or above a semiconductor substrate 70 and further having a wire grid polarizer 91 and an on-chip microlens 15 are arrayed in a two-dimensional matrix, and a first interlayer insulating layer 83 and a second interlayer insulating layer 84 provided on a light incident side of the photoelectric conversion portions 10. The wire grid polarizer 91 is provided between the first interlayer insulating layer 83 and the second interlayer insulating layer 84, and the on-chip microlens 15 is provided on the second interlayer insulating layer 84. The first interlayer insulating layer 83 and the second interlayer insulating layer 84 include an oxide material or a resin material, and the on-chip microlens includes SiN or SiON.
    Type: Application
    Filed: April 6, 2018
    Publication date: November 25, 2021
    Inventors: Takeshi Yanagita, Tomohiko Asatsuma
  • Publication number: 20210343771
    Abstract: The present technology relates to a solid-state imaging element, a solid-state imaging element package, and electronic equipment that can suppress occurrence of flares. The solid-state imaging element includes an effective pixel region and a peripheral circuit region. The effective pixel region includes a plurality of pixels arranged two-dimensionally in a matrix pattern. The peripheral circuit region is provided around the effective pixel region. The effective pixel region has a pixel-to-pixel light-shielding film formed at boundary portions between the pixels. In a region on a substrate where a rib structure is formed within the peripheral circuit region, no light-shielding film is formed in the same layer as the pixel-to-pixel light-shielding film. The present technology is applicable, for example, to a solid-state imaging element package including a cover glass that protects a light-receiving surface of the solid-state imaging element.
    Type: Application
    Filed: October 11, 2019
    Publication date: November 4, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoko IIDA, Tomohiko ASATSUMA
  • Patent number: 11088186
    Abstract: A high degree of phase difference detection accuracy can be obtained using a phase difference pixel with a simpler configuration. A solid-state image-capturing device includes a pixel array unit in which a plurality of pixels including a phase difference pixel which is a pixel for focal point detection and an image-capturing pixel which is a pixel for image generation are arranged in a two-dimensional array. In this case, a predetermined layer between a light shielding layer and a micro lens formed in the image-capturing pixel has a higher refraction index than a refraction index of the predetermined layer formed in the phase difference pixel. The technique of the present disclosure can be applied to, for example, a back-illuminated-type solid-state image-capturing device and the like.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: August 10, 2021
    Assignee: SONY CORPORATION
    Inventor: Tomohiko Asatsuma
  • Publication number: 20210202545
    Abstract: A solid-state imaging element which detects visible light and ultraviolet light in one pixel provides improved resolution. First and second photoelectric conversion elements each perform photoelectric conversion. of incident light. A first accumulation part accumulates electric charges that are photoelectrically converted by the first photoelectric conversion element. second accumulation part is disposed on one face of a substrate and accumulates electric charges that are photoelectrically converted by the second photoelectric conversion element. A connection part is connected to the second accumulation part and transfers the electric charges accumulated in the second accumulation part to another face of the substrate.
    Type: Application
    Filed: September 2, 2019
    Publication date: July 1, 2021
    Inventors: SATOKO IIDA, YOSHIAKI KITANO, KENGO NAGATA, TOSHIAKI ONO, TOMOHIKO ASATSUMA
  • Publication number: 20210193727
    Abstract: The present technology relates to an imaging device and an electronic device enabling expansion of a dynamic range of the imaging device without deteriorating the image quality.
    Type: Application
    Filed: February 24, 2017
    Publication date: June 24, 2021
    Inventors: TOMOHIKO ASATSUMA, MINORU ISHIDA
  • Patent number: 10917591
    Abstract: The present disclosure relates to a solid-state imaging device and a method of controlling a solid-state imaging device, and an electronic device for enabling appropriate expansion of a dynamic range with respect to an object moving at a high speed or an object having a large luminance difference between bright and dark to reduce motion distortion (motion artifact). Exposure of a plurality of pixels is individually controlled in units of pixels. The present disclosure can be applied to a solid-state imaging device.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: February 9, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoko Iida, Masaki Sakakibara, Yorito Sakano, Naosuke Asari, Masaaki Takizawa, Tomohiko Asatsuma, Shogo Furuya