Patents by Inventor Tomohiko Ihara

Tomohiko Ihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5348792
    Abstract: This multilayered wiring board having a multilayered wiring structure includes a first mesh wiring layer having a plurality of holes therein, and a second wiring layer having a plurality of wirings. The wirings of the second wiring layer undulate up and down so as to descend towards the holes formed in the first wiring layer. In another arrangement, the first wiring layer has a plurality of protrusions protruding toward the second wiring layer at locations between adjacent ones of the wirings of the second wiring layer. In these wiring boards, crosstalk between the wirings is suppressed.
    Type: Grant
    Filed: April 19, 1993
    Date of Patent: September 20, 1994
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hisao Hattori, Tomohiko Ihara, Hiroshi Yoshino, Shosaku Yamanaka
  • Patent number: 5134459
    Abstract: A lead frame for a high-density, sealed type of semiconductor device having many input/output pins and capable of high-speed operation is made of a magnetic material with a covering layer of a non-magnetic metal. The covering layer covers a top surface, a bottom surface, both side surfaces and an inner end face of a portion of the leads of the lead frame which is to be sealed in a semiconductor package. The covering layer has a thickness of 1 micron or more at both side surfaces of each lead. Therefore, the inductance at the leads can be reduced remarkably. Thus, the semiconductor can be operated at a high speed with improved reliability.
    Type: Grant
    Filed: March 1, 1991
    Date of Patent: July 28, 1992
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Maeda, Tomohiko Ihara, Masaharu Yasuhara, Shosaku Yamanaka