Abstract: A monitoring system includes an arithmetic processor. The arithmetic processor receives captured image information representing a captured image obtained by capturing an image of a subject and generates notification information representing a particular notification content depending on a condition of the subject. The arithmetic processor includes a first arithmetic processor and a second arithmetic processor. The first arithmetic processor obtains a condition quantity by quantifying the condition of the subject by reference to the captured image information and based on a parameter about a human activity status. The second arithmetic processor selects, according to the condition quantity, the particular notification content from contents of notification classified into N stages, where N is an integer equal to or greater than three.

Abstract: A monitoring system includes an arithmetic processor. The arithmetic processor receives captured image information representing a captured image obtained by capturing an image of a subject and generates notification information representing a particular notification content depending on a condition of the subject. The arithmetic processor includes a first arithmetic processor and a second arithmetic processor. The first arithmetic processor obtains a condition quantity by quantifying the condition of the subject by reference to the captured image information and based on a parameter about a human activity status. The second arithmetic processor selects, according to the condition quantity, the particular notification content from contents of notification classified into N stages, where N is an integer equal to or greater than three.

Abstract: A distance measuring device using a TOF (Time of Flight) scheme includes a controller, a light receiver, and a calculator. The controller generates a first exposure signal, a second exposure signal, a third exposure signal, and one particular exposure signal selected from the first, the second, and the third exposure signals. The light receiver performs a first exposing process, a second exposing process, a third exposing process, and a particular exposing process corresponding to the particular exposure signal out of the first, the second, and the third exposing processes. The calculator determines, based on a difference between an exposure amount obtained from the particular exposing process and an exposure amount obtained from an exposing process according to one of the first, second, and the third exposure signals corresponding to the particular exposure signal, whether or not the light emitted from the distance measuring device interferes with light emitted from other distance measuring device.

Abstract: An imaging device includes: a controller which generates a light emission signal and an exposure signal; a light source unit which receives the light emission signal and emits light; a light receiver which obtains the exposure amount of reflected light at a timing in accordance with the exposure signal; and a calculator which outputs a distance signal (distance image) by calculation on the basis of the amount of signals included in imaging signals received from the light receiver. The controller generates two or more patterns of varying phase relationships between the light emission signal and the exposure signal, and outputs the light emission signal and the exposure signal in a cycle that is different between at least two of the patterns.

Abstract: A distance measuring device using a TOF (Time of Flight) scheme includes a controller, a light receiver, and a calculator. The controller generates a first exposure signal, a second exposure signal, a third exposure signal, and one particular exposure signal selected from the first, the second, and the third exposure signals. The light receiver performs a first exposing process, a second exposing process, a third exposing process, and a particular exposing process corresponding to the particular exposure signal out of the first, the second, and the third exposing processes. The calculator determines, based on a difference between an exposure amount obtained from the particular exposing process and an exposure amount obtained from an exposing process according to one of the first, second, and the third exposure signals corresponding to the particular exposure signal, whether or not the light emitted from the distance measuring device interferes with light emitted from other distance measuring device.

Abstract: An apparatus for testing electric characteristics of a semiconductor device having a plurality of hemispherical electrode terminals on one surface thereof, including: a support plate vertically movably supported by an elastic member, supporting a side of the one surface of the semiconductor device, and having through holes for accommodating the hemispherical electrode terminals; a probe pin securing block placed under the support plate; a plurality of probe pins secured to the probe pin securing block and having concave-shaped tips facing the hemispherical electrode terminals of the semiconductor device supported by the support plate; and a vertically movable pressing head placed over the support plate for applying a downward pressure on the support plate, wherein after the support plate is lowered by a predetermined amount by the downward pressure from the pressing head, the pressing head contacts the semiconductor device and applies a downward pressure thereon.

Abstract: A semiconductor testing circuit of the present invention includes a signal line which is connected to a terminal not to be tested and a plurality of terminals to be tested of a semiconductor device; switch circuits for controlling electrical connection/disconnection between the signal line and the terminals to be tested; and a resistor connected to one end of the signal line. With this configuration, in a test on the AC characteristics of an input signal, a test signal generated by an LSI tester can be inputted to the terminals to be tested through the terminal not to be tested and the signal line by turning on the switch circuits.

Abstract: In a conductive contact pin brought into contact with the external electrode of a semiconductor device to conduct a test on the electrical characteristics of the semiconductor device, an upper plunger 13 which is a contact pin coming in and out of a cylindrical body is made up of a base b which is in sliding contact with the cylindrical body and is not in contact with the external electrode and an end a which comes into contact with the external electrode. The base b has at least a surface layer made of a precious metal, and the end a has at least a surface layer made of one of a different metal from the base b and a metal alloy.

Abstract: A semiconductor testing circuit of the present invention includes a signal line which is connected to a terminal not to be tested and a plurality of terminals to be tested of a semiconductor device; switch circuits for controlling electrical connection/disconnection between the signal line and the terminals to be tested; and a resistor connected to one end of the signal line. With this configuration, in a test on the AC characteristics of an input signal, a test signal generated by an LSI tester can be inputted to the terminals to be tested through the terminal not to be tested and the signal line by turning on the switch circuits.

Abstract: In testing a large number of semiconductor devices, semiconductor testing equipment of the present invention is provided with combination determining unit 105 that determines the combination of semiconductor devices to be simultaneously tested among semiconductor devices to be tested, on the basis of one of determination results or measured values in separate testing or manufacturing implemented before and stored in a memory 99, and past determination results or measured values stored in the memory 99 in the present testing.

Abstract: An object of the present invention is to provide a handler and a testing method thereof which enable efficient measurements on a plurality of semiconductor devices. An arm control unit 106 controls, for each of contact arms 101a and 101b, the timing of control for performing contact control for bringing semiconductor devices 103a and 103b to be tested to one of a contact state and a non-contact state with test boards 108a and 108b connected to semiconductor testers 109a and 109b. The plurality of semiconductor devices are simultaneously measured using the handler 107, so that when a “defective item” is found on a specific measurement part, only the defective item on the measurement part can be replaced with another untested item and thus tests can be efficiently conducted.

Abstract: An assembly for an LSI test supplies a test signal output from an LSI tester to a target LSI to be tested and outputs, to the LSI tester, a test result signal generated by processing of the target LSI performed in accordance with the test signal. The assembly for an LSI test includes: a peripheral circuit coupled to the target LSI and allowing the target LSI to operate in the same manner as in the application environment; and a printed circuit board on which the peripheral circuit is mounted.

Abstract: An ancillary equipment is provided for testing a semiconductor integrated circuit, by which a plurality of BOST boards serving as measuring units can be set near a device to be measured and tests can be conducted with high accuracy on a number of circuits embedded on a semiconductor integrated circuit such as a system LSI. To achieve an object of performing a go/no go test or a functional/performance characterization in the manufacturing process of the semiconductor integrated circuit, the ancillary equipment includes: a device measuring unit having a measuring section for exchanging a signal with a device or a semiconductor integrated circuit, and an analyzing section for analyzing information from the measuring section using a programmable device; and a control/communication card constituted of a board different from that of the device measuring unit and connected to the device measuring unit to control it, and being capable of performing communication with a general-purpose computer.

Abstract: A test equipment for semiconductor according to the present invention comprises a equipment main body and a memory cell provided in an outside of the equipment main body, wherein the equipment main body comprises a configurable device capable of making a hardware construction in a programmable manner and an interface for connecting the configurable device to the outside of the equipment main body in order to configure the configurable device, and the memory cell, in which a regulation program for the hardware construction for regulating the hardware construction of the configurable device is written, is connected in freely attached or removed way to the configurable device via the interface.

Abstract: In the shipment test of an LSI provided with a high-speed interface circuit, both cost reduction and a high test guarantee level are realized.

Abstract: An ancillary equipment is provided for testing a semiconductor integrated circuit, by which a plurality of BOST boards serving as measuring units can be set near a device to be measured and tests can be conducted with high accuracy on a number of circuits embedded on a semiconductor integrated circuit such as a system LSI. To achieve an object of performing a go/no go test or a functional/performance characterization in the manufacturing process of the semiconductor integrated circuit, the ancillary equipment includes: a device measuring unit having a measuring section for exchanging a signal with a device or a semiconductor integrated circuit, and an analyzing section for analyzing information from the measuring section using a programmable device; and a control/communication card constituted of a board different from that of the device measuring unit and connected to the device measuring unit to control it, and being capable of performing communication with a general-purpose computer.

Abstract: An assembly for an LSI test supplies a test signal output from an LSI tester to a target LSI to be tested and outputs, to the LSI tester, a test result signal generated by processing of the target LSI performed in accordance with the test signal. The assembly for an LSI test includes: a peripheral circuit coupled to the target LSI and allowing the target LSI to operate in the same manner as in the application environment; and a printed circuit board on which the peripheral circuit is mounted.

Abstract: A test of an LSI device under test (20) including a physical layer section (21) which has a high-speed interface function is performed. An LSI device test unit (1) including a reference LSI device (10) which has already been confirmed as being non-defective is placed on a test board (2), and high-speed pins of the LSI devices (10, 20) are connected to each other. An LSI tester (3) accesses logical layer sections (12, 22) at a low speed to control a high-speed communication between physical layer sections (11, 21) and read received data, and determines whether or not the LSI device under test (20) is defective.

Abstract: The decrypting device of this invention includes: a decrypting key generation circuit for generating a decrypting key based on first decrypting key information and second decrypting key information; and a decrypting circuit for decrypting encrypted information using the decrypting key, wherein the first decrypting key information is input from outside the decrypting device, and the second decrypting key information is stored inside the decrypting device.