Abstract: A multi-layer electronic components aggregate board according to the present invention is a multi-layer electronic components aggregate board which enables extracting plural multi-layer electronic components by cutting and includes a trimming pattern 122b formed on a predetermined insulation layer out of plural insulation layers and recognition marks formed on the same insulation layer, the recognition marks indicating the relative positional relationship with respect to the trimming pattern 122b. This enables specifying the trimming position with an extremely simple process, even in the case of specifying the trimming position through image recognition. Furthermore, since the recognition marks and the trimming pattern are formed on the same layer, it is possible to prevent the occurrence of pattern deviation among layers, thus enabling specifying the trimming position with high accuracy.

Abstract: A method for adjusting the characteristics of multi-layer electronic components according to the present invention includes a determination process S21 for determining the characteristics of a multi-layer electronic component, a calculation process S22 for calculating the required amount of trimming on the basis of the result of determination obtained in the determination process S21, and a trimming process S23 for applying trimming to a trimming pattern provided in the multi-layer electronic component, in accordance with the amount of trimming obtained in the calculation process. The present invention enables performing the determination process S21 and the trimming process S23 in parallel for different multi-layer electronic components instead of performing trimming concurrently with real time determination of characteristics, thus enabling efficiently adjusting the characteristics of plural multi-layer electronic components on aggregate boards.

Abstract: A conductor pattern having joint portions to which electrodes of a semiconductor element chip are to be joined is formed on a board on which the semiconductor element chip is to be mounted. Further, a solder resist is formed on the board so as to be apart from both of adjacent joint portions by a predetermined distance and so as to space the adjacent joint portions from each other.