Patents by Inventor TOMOHIKO MORIYA

TOMOHIKO MORIYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8710567
    Abstract: The semiconductor device of the present invention includes a silicon substrate having a logic region and a RAM region, an NMOS transistor formed in the logic region, and an NMOS transistor formed in the RAM region. The NMOS transistor has a stack structure obtained by sequentially stacking the gate insulating film and the metal gate electrode over the silicon substrate. The NMOS transistor has a cap film containing an element selected from a group consisting of lanthanum, ytterbium, magnesium, strontium, and erbium as a composition element between the silicon substrate and metal gate electrode. The cap film is not formed in the NMOS transistor.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 29, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Tomohiko Moriya
  • Publication number: 20110204450
    Abstract: The semiconductor device of the present invention includes a silicon substrate having a logic region and a RAM region, an NMOS transistor formed in the logic region, and an NMOS transistor formed in the RAM region. The NMOS transistor has a stack structure obtained by sequentially stacking the gate insulating film and the metal gate electrode over the silicon substrate. The NMOS transistor has a cap metal containing an element selected from a group consisting of lanthanum, ytterbium, magnesium, strontium, and erbium as a composition element between the silicon substrate and metal gate electrode. The cap metal is not formed in the NMOS transistor.
    Type: Application
    Filed: February 24, 2011
    Publication date: August 25, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: TOMOHIKO MORIYA