Patents by Inventor Tomohiko Oouchi

Tomohiko Oouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020153555
    Abstract: The write performance and erasion performance of a nonvolatile semiconductor memory having as its memory elements MOSFETs in each of which a floating gate electrode is formed on each of the two sidewalls of a control gate electrode are to be improved, and the read performance is also to be improved. Part of the control gate electrode is extended above the floating gate electrodes on its two sidewalls. A source region and a drain region are formed alongside the outer boundaries of the floating gate electrodes so,that electric charges can be separately injected into the two floating gate electrodes.
    Type: Application
    Filed: April 24, 2002
    Publication date: October 24, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Yukiko Manabe, Kousuke Okuyama, Tomohiko Oouchi, Takashi Takeuchi
  • Publication number: 20020040992
    Abstract: The write performance and erasion performance of a nonvolatile semiconductor memory having as its memory elements MOSFETs in each of which a floating gate electrode is formed on each of the two sidewalls of a control gate electrode are to be improved, and the read performance is also to be improved. Part of the control gate electrode is extended above the floating gate electrodes on its two sidewalls. A source region and a drain region are formed alongside the outer boundaries of the floating gate electrodes so that electric charges can be separately injected into the two floating gate electrodes.
    Type: Application
    Filed: July 17, 2001
    Publication date: April 11, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Yukiko Manabe, Kousuke Okuyama, Tomohiko Oouchi, Takashi Takeuchi