Patents by Inventor Tomohiro Kamimura

Tomohiro Kamimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7956435
    Abstract: In recent years, as electronic equipment becomes thinner, an area for mounting a semiconductor device used in the electronic equipment is required to be smaller, and a thickness of an encapsulating resin for encapsulating a semiconductor substrate having a circuit formed thereon and the like also becomes smaller. The encapsulating resin is marked with a product number, a manufacturer name, or the like. There arises a problem in that, in the marking, an infrared laser beam applied to the encapsulating resin passes through the encapsulating resin, generates heat in the semiconductor substrate, and destructs the formed circuit. By providing a thin film for refracting the infrared laser beam on a rear surface of the semiconductor substrate, the optical path of the infrared laser beam is made longer to reduce heat generated in the semiconductor substrate.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tomohiro Kamimura
  • Patent number: 7867884
    Abstract: A wafer fabrication method includes a first step of forming a plurality of first channel regions in a first region on a surface of a water, a second step of forming a plurality of second channel regions having an impurity concentration different from an impurity concentration of the first channel regions, a third step of forming a plurality of third channel regions in a third region on the surface of the water, and a fourth step of forming a plurality of fourth channel regions having an impurity concentration different from an impurity concentration of the third channel regions in a fourth region, wherein the first region and the second region are divided by a first line segment on the wafer, and the third and fourth regions are divided by a second line segment intersecting with the first line segment on the wafer.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: January 11, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomohiro Kamimura, Kou Sasaki, Tomoharu Inoue
  • Publication number: 20090230539
    Abstract: In recent years, as electronic equipment becomes thinner, an area for mounting a semiconductor device used in the electronic equipment is required to be smaller, and a thickness of an encapsulating resin for encapsulating a semiconductor substrate having a circuit formed thereon and the like also becomes smaller. The encapsulating resin is marked with a product number, a manufacturer name, or the like. There arises a problem in that, in the marking, an infrared laser beam applied to the encapsulating resin passes through the encapsulating resin, generates heat in the semiconductor substrate, and destructs the formed circuit. By providing a thin film for refracting the infrared laser beam on a rear surface of the semiconductor substrate, the optical path of the infrared laser beam is made longer to reduce heat generated in the semiconductor substrate.
    Type: Application
    Filed: February 12, 2009
    Publication date: September 17, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: TOMOHIRO KAMIMURA
  • Publication number: 20080261386
    Abstract: A third channel region into which a high concentration N-type impurity is implanted, a fourth channel region into which a low concentration N-type impurity is implanted, a first channel region into which a high concentration P-type impurity is implanted, and a second channel region into which a low concentration P-type impurity is implanted are formed in predetermined regions on a wafer. A first region where the second channel region and the third channel region are formed, a second region where the second channel region and the forth channel region are formed, a third region where the first channel region and the third channel region are formed, and a fourth region where the first channel region and the forth channel region are formed are thereby formed.
    Type: Application
    Filed: April 15, 2008
    Publication date: October 23, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Tomohiro Kamimura, Kou Sasaki, Tomoharu Inoue
  • Publication number: 20070293032
    Abstract: A semiconductor manufacturing apparatus includes a controller, a wafer stage and an optical unit. The wafer stage is configured to move a semiconductor wafer. The optical unit is configured to expose a first resist film in each of shots of the semiconductor wafer by using a first mask pattern and to expose a second resist film in of the shot by using a second mask pattern. The first mask pattern includes a first interconnection mask pattern and a first identification mask pattern. The second mask pattern includes a second interconnection mask pattern and a second identification mask pattern. A first interconnection metal pattern corresponding to the first interconnection mask pattern and a first identification pattern corresponding to the first identification mask pattern are formed in the first resist film.
    Type: Application
    Filed: June 13, 2007
    Publication date: December 20, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tomohiro Kamimura
  • Patent number: 7234635
    Abstract: A transaction degradation processing method to decide available transactions of automated transaction apparatus easily executes transaction degradation processing for a plurality of automated transaction apparatus installations. An administration server is connected with a plurality of the automated transaction apparatus and performs transaction degradation processing for a plurality of installations of automated transaction apparatus by using a database. There is no longer a need for separately installing programs and tables in each of automated transaction apparatus installations, modification of the table specifications is facilitated, and program maintainability is improved.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: June 26, 2007
    Assignees: Fujitsu Limited, Fujitsu Frontech Limited
    Inventors: Shinichiro Tsuchiya, Satoshi Tomi, Hiroaki Yamashita, Shogo Kawabata, Tomohiro Kamimura
  • Publication number: 20050199701
    Abstract: A transaction degradation processing method to decide available transactions of automated transaction apparatus easily executes transaction degradation processing for a plurality of automated transaction apparatus installations. An administration server is connected with a plurality of the automated transaction apparatus and performs transaction degradation processing for a plurality of installations of automated transaction apparatus by using a database. There is no longer a need for separately installing programs and tables in each of automated transaction apparatus installations, modification of the table specifications is facilitated, and program maintainability is improved.
    Type: Application
    Filed: November 10, 2004
    Publication date: September 15, 2005
    Applicants: Fujitsu Limited, Fujitsu Frontech Limited
    Inventors: Shinichiro Tsuchiya, Satoshi Tomi, Hiroaki Yamashita, Shogo Kawabata, Tomohiro Kamimura