Patents by Inventor Tomohiro Murata

Tomohiro Murata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7800116
    Abstract: A semiconductor device includes: a first semiconductor layer which is made of a first group III nitride semiconductor; a cap layer which is formed on the first semiconductor layer, which is made of a second group III nitride semiconductor, and which has an opening for exposing the first semiconductor layer; and a source electrode and a drain electrode which are formed on the cap layer so as to oppose to each other with the opening interposed. A gate electrode is formed on the bottom face of the opening with an insulating film interposed. The insulating film is formed on at least a part of the first semiconductor layer which is exposed through the opening.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: September 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Tomohiro Murata, Masayuki Kuroda, Tetsuzo Ueda
  • Publication number: 20100207165
    Abstract: According to a method for fabricating a semiconductor device, a first semiconductor layer made of a first nitride semiconductor is formed over a substrate. Thereafter, a mask film covering part of the upper surface of the first semiconductor layer is selectively formed on the first semiconductor layer. A multilayer film, in which second and third nitride semiconductors having different band gaps are stacked, is selectively formed on the first semiconductor layer with the mask film used as a formation mask. On the multilayer film, an ohmic electrode is formed.
    Type: Application
    Filed: April 28, 2010
    Publication date: August 19, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tomohiro MURATA, Yutaka Hirose, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • Publication number: 20100129992
    Abstract: A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.
    Type: Application
    Filed: January 28, 2010
    Publication date: May 27, 2010
    Applicant: Panasonic Corporation
    Inventors: Tomohiro MURATA, Yutaka Hirose, Tsuyoshi Tanaka, Yasuhiro Uemoto
  • Publication number: 20100090250
    Abstract: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
    Type: Application
    Filed: December 14, 2009
    Publication date: April 15, 2010
    Applicant: PANASONIC CORORATION
    Inventors: Tomohiro MURATA, Hiroaki Ueno, Hidetoshi Ishida, Tetsuzo Ueda, Yasuhiro Uemoto, Tsuyoshi Tanaka, Daisuke Ueda
  • Patent number: 7656010
    Abstract: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: February 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Tomohiro Murata, Hiroaki Ueno, Hidetoshi Ishida, Tetsuzo Ueda, Yasuhiro Uemoto, Tsuyoshi Tanaka, Daisuke Ueda
  • Publication number: 20090050937
    Abstract: A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.
    Type: Application
    Filed: October 24, 2008
    Publication date: February 26, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Tomohiro MURATA, Yutaka Hirose, Tsuyoshi Tanaka, Yasuhiro Uemoto
  • Patent number: 7479651
    Abstract: A semiconductor device comprises an active layer formed on a substrate, a superlattice layer formed on the active layer, and an ohmic electrode formed on the superlattice layer. In the superlattice layer, a first thin film and a second thin film are alternately laminated. The second thin film is made of a semiconductor which has polarization characteristics different from those of the first thin film and a band gap larger than that of the first thin film. An interface region between an upper surface of the first thin film and a lower surface of the second thin film or an interface region between a lower surface of the first thin film and an upper surface of the second thin film, is doped with an impurity.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: January 20, 2009
    Assignee: Panasonic Corporation
    Inventors: Tomohiro Murata, Yutaka Hirose, Tsuyoshi Tanaka
  • Publication number: 20080237605
    Abstract: A semiconductor device includes: a first semiconductor layer which is made of a first group III nitride semiconductor; a cap layer which is formed on the first semiconductor layer, which is made of a second group III nitride semiconductor, and which has an opening for exposing the first semiconductor layer; and a source electrode and a drain electrode which are formed on the cap layer so as to oppose to each other with the opening interposed. A gate electrode is formed on the bottom face of the opening with an insulating film interposed. The insulating film is formed on at least a part of the first semiconductor layer which is exposed through the opening.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Inventors: Tomohiro MURATA, Masayuki KURODA, Tetsuzo UEDA
  • Publication number: 20080067546
    Abstract: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 20, 2008
    Inventors: Tomohiro MURATA, Hiroaki UENO, Hidetoshi ISHIDA, Tetsuzo UEDA, Yasuhiro UEMOTO, Tsuyoshi TANAKA, Daisuke UEDA
  • Patent number: 7339207
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1?xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1?N; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: March 4, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Publication number: 20070254419
    Abstract: A semiconductor device has a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having such a composition as to generate a 2-dimensional electron gas layer in the upper portion of the first nitride semiconductor layer, and an electrode having an ohmic property and formed selectively on the second nitride semiconductor layer. The second nitride semiconductor layer includes a contact area having at least one inclined portion with a bottom or wall surface thereof being inclined toward the upper surface of the first nitride semiconductor layer and defining a depressed cross-sectional configuration. The electrode is formed on the contact area.
    Type: Application
    Filed: June 26, 2007
    Publication date: November 1, 2007
    Applicant: MATSUSHIDA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Atsuhiko Kanda, Tsuyoshi Tanaka, Yasuhiro Uemoto, Yutaka Hirose, Tomohiro Murata
  • Publication number: 20070176204
    Abstract: A field effect transistor includes a first semiconductor layer made of a first group III-V nitride; a second semiconductor layer formed on the first semiconductor layer, made of a second group III-V nitride and having a gate recess portion for exposing the first semiconductor layer therein; and a gate electrode formed on the first semiconductor layer in the gate recess portion. A product of stress applied by the second semiconductor layer to the first semiconductor layer and the thickness of the second semiconductor layer is 0.1 N/cm or less.
    Type: Application
    Filed: January 30, 2007
    Publication date: August 2, 2007
    Inventors: Tomohiro Murata, Hidetoshi Ishida
  • Patent number: 7247891
    Abstract: A semiconductor device has a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having such a composition as to generate a 2-dimensional electron gas layer in the upper portion of the first nitride semiconductor layer, and an electrode having an ohmic property and formed selectively on the second nitride semiconductor layer. The second nitride semiconductor layer includes a contact area having at least one inclined portion with a bottom or wall surface thereof being inclined toward the upper surface of the first nitride semiconductor layer and defining a depressed cross-sectional configuration. The electrode is formed on the contact area.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: July 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsuhiko Kanda, Tsuyoshi Tanaka, Yasuhiro Uemoto, Yutaka Hirose, Tomohiro Murata
  • Patent number: 7188136
    Abstract: In an information distributing method, an information providing resource receives from an information user unit a request statement including a code to identify first information and information (URI) to identify second information quoted in the first information. According to the identifying information of the second information included in the request statement, the information providing resource determines whether or not transmission of the second information to an information providing unit is allowed. The information providing side can control the operation in which the second information thereof is quoted to be opened in the first information.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: March 6, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hirokazu Aoshima, Tomohiro Murata, Tsukasa Saitou, Kazuya Uemura, Yoshio Endou
  • Patent number: 7187014
    Abstract: A semiconductor device has a sapphire substrate, a semiconductor layer made of GaN provided on the sapphire substrate, a multilayer film provided on the semiconductor layer, and an electrode in ohmic contact with the multilayer film. The multilayer film has been formed by alternately stacking two types of semiconductor layers having different amounts of piezopolarization or different amounts of spontaneous polarization and each containing an n-type impurity so that electrons are induced at the interface between the two types of semiconductor layers. This allows the contact resistance between the electrode and the multilayer film and a parasitic resistance in a current transmission path to be reduced to values lower than in a conventional semiconductor device.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: March 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yutaka Hirose, Daisuke Ueda, Tsuyoshi Tanaka, Yasuhiro Uemoto, Tomohiro Murata
  • Publication number: 20060289894
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1?xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1?N; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 28, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Publication number: 20060284318
    Abstract: According to a method for fabricating a semiconductor device, a first semiconductor layer made of a first nitride semiconductor is formed over a substrate. Thereafter, a mask film covering part of the upper surface of the first semiconductor layer is selectively formed on the first semiconductor layer. A multilayer film, in which second and third nitride semiconductors having different band gaps are stacked, is selectively formed on the first semiconductor layer with the mask film used as a formation mask. On the multilayer film, an ohmic electrode is formed.
    Type: Application
    Filed: May 19, 2006
    Publication date: December 21, 2006
    Inventors: Tomohiro Murata, Yutaka Hirose, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • Patent number: 7078743
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: July 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Publication number: 20060118822
    Abstract: A semiconductor device comprises an active layer formed on a substrate, a superlattice layer formed on the active layer, and an ohmic electrode formed on the superlattice layer. In the superlattice layer, a first thin film and a second thin film are alternately laminated. The second thin film is made of a semiconductor which has polarization characteristics different from those of the first thin film and a band gap larger than that of the first thin film. An interface region between an upper surface of the first thin film and a lower surface of the second thin film or an interface region between a lower surface of the first thin film and an upper surface of the second thin film, is doped with an impurity.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 8, 2006
    Inventors: Tomohiro Murata, Yutaka Hirose, Tsuyoshi Tanaka
  • Publication number: 20050139838
    Abstract: A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.
    Type: Application
    Filed: December 23, 2004
    Publication date: June 30, 2005
    Inventors: Tomohiro Murata, Yutaka Hirose, Tsuyoshi Tanaka, Yasuhiro Uemoto