Patents by Inventor Tomohiro Ogasawara

Tomohiro Ogasawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8238181
    Abstract: A semiconductor device includes first and second lines, and a switch between the first and second lines. The switch temporary and electrically connects the first and second lines to each other, when the first signal line is transitioned from a first level to a second level while the second signal line is transitioned from the second level to the first level.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: August 7, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Tomohiro Ogasawara, Kiyotake Sakurai
  • Publication number: 20100195417
    Abstract: A semiconductor device includes first and second lines, and a switch between the first and second lines. The switch temporary and electrically connects the first and second lines to each other, when the first signal line is transitioned from a first level to a second level while the second signal line is transitioned from the second level to the first level.
    Type: Application
    Filed: January 27, 2010
    Publication date: August 5, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Tomohiro OGASAWARA, Kiyotake SAKURAI
  • Publication number: 20090196107
    Abstract: A semiconductor device selects one mask pattern among from a plurality of the mask patterns, which are stored in a mask resister circuit for mask controlling of a bit width (vertical axis), by a mask pattern selection signal, and controls input and output of data based on the selected mask pattern and a mask control signal of a bit string (horizontal axis), when inputting and outputting data having the consecutive bit string (horizontal axis) and a plurality of the bit widths (vertical axis). A read data converter circuit and a write data converter circuit select to mask or unmask each data signal during burst reading or writing, and masks the data signal. The masked data signal is not written in a memory cell by inactivating a write data buffer circuit during writing, and is not read out by inactivating a data driver circuit connecting with an external input and output terminal.
    Type: Application
    Filed: January 27, 2009
    Publication date: August 6, 2009
    Applicant: Elpida Memory, Inc.
    Inventors: Tomohiro Ogasawara, Toru Ishikawa