Patents by Inventor Tomohiro Ohta
Tomohiro Ohta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11911544Abstract: A blood purification apparatus that includes a blood circuit including an arterial blood circuit and a venous blood circuit and that allows a patient's blood to extracorporeally circulate, with a blood purifier that is interposed between the arterial blood circuit and the venous blood circuit and purifies; a dialysate temporary chamber that temporarily stores dialysate received from a dialysate storage supported by a supporting unit; a substitution-fluid temporary chamber that temporarily stores substitution fluid received from a substitution-fluid storage supported by the supporting unit; a first dialysate introduction line through which the dialysate in the dialysate storage flows into the dialysate temporary chamber; and a substitution line through which the substitution fluid in the substitution-fluid storage flows into the substitution-fluid temporary chamber.Type: GrantFiled: April 8, 2021Date of Patent: February 27, 2024Assignee: Nikkiso Company LimitedInventors: Tomohiro Furuhashi, Yuki Eda, Masaaki Ohta, Kenji Furuhashi
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Patent number: 7476619Abstract: An object of the invention is to make it possible to perform the embedding of a Cu diffusion preventing film and a Cu film to a fine pattern of a high aspect ratio by using a medium of a supercritical state in a manufacturing process of a semiconductor device. The object of the invention is achieved by a substrate processing method comprising a first step of processing a substrate by supplying a first processing medium containing a first medium of a supercritical state onto the substrate, a second step of forming a Cu diffusion preventing film on the substrate by supplying a second processing medium containing a second medium of a supercritical state onto the substrate, and a third step of forming a Cu film on the substrate by supplying a third processing medium containing a third medium of a supercritical state onto the substrate.Type: GrantFiled: December 26, 2003Date of Patent: January 13, 2009Assignees: Tokyo Electron LimitedInventors: Eiichi Kondoh, Vincent Vezin, Kenichi Kubo, Yoshinori Kureishi, Tomohiro Ohta
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Publication number: 20080311313Abstract: For a substrate (W) placed in an airtight processing vessel (1), plasma is generated by introducing a microwave to a radial line slot antenna (4). Conditions are set such that the pressure in the processing vessel is in the range of from 7.32 Pa to 8.65 Pa, the microwave power is in the range of from 2000W to 2300W, the distance (L1) between the surface of the substrate and an opposed face of a raw-material supply member (3) is in the range of from 70 mm to 105 mm, and the distance (L2) between the surface of the substrate and an opposed face of a discharge gas supply member (2) is in the range of from 100 mm to 140 mm. Under these conditions, a raw-material gas consisting of a cyclic C5F8 gas is activated based on energy of the microwave. Consequently, film-forming species containing C4F6 ions and/or C4F6 radicals in a greater content can be obtained. Thus, a fluorine-added carbon film excellent in the leak properties and heat stability can be securely formed.Type: ApplicationFiled: October 4, 2005Publication date: December 18, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Yasuo Kobayashi, Tomohiro Ohta, Songyun Kang, Ikuo Sawada
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Patent number: 7390830Abstract: This invention provides remedies or prophylactics for diseases in association with chemokines such as MIP-1 ? and/or MCP-1. Namely, remedies or prophylactics for diseases in association with the chemokines such as rheumatoid arthritis or nephritis contain, as the active ingredient, cyclic amine derivatives represented by the following formula (I), pharmaceutically acceptable acid addition salts thereof or pharmaceutically acceptable C1-C6 alkyl addition salts thereof.Type: GrantFiled: May 18, 2000Date of Patent: June 24, 2008Assignee: Teijin LimitedInventors: Tatsuki Shiota, Fuminori Miyagi, Takashi Kamimura, Tomohiro Ohta, Yasuhiro Takano, Hideki Horiuchi
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Publication number: 20060154482Abstract: An object of the invention is to make it possible to perform the embedding of a Cu diffusion preventing film and a Cu film to a fine pattern of a high aspect ratio by using a medium of a supercritical state in a manufacturing process of a semiconductor device. The object of the invention is achieved by a substrate processing method comprising a first step of processing a substrate by supplying a first processing medium containing a first medium of a supercritical state onto the substrate, a second step of forming a Cu diffusion preventing film on the substrate by supplying a second processing medium containing a second medium of a supercritical state onto the substrate, and a third step of forming a Cu film on the substrate by supplying a third processing medium containing a third medium of a supercritical state onto the substrate.Type: ApplicationFiled: December 26, 2003Publication date: July 13, 2006Inventors: Eiichi Kondoh, Vincent Vezin, Kenichi Kubo, Yoshinori Kureishi, Tomohiro Ohta
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Publication number: 20050260846Abstract: A substrate processing method is disclosed that, when forming a copper film on a miniaturized pattern with a copper diffusion prevention film being formed thereon, allows cleaning the copper diffusion prevention film on a substrate by using a supercritical medium, and allows the copper film to be formed by using the supercritical medium while preventing void occurrence and ensuring good adhesiveness with the miniaturized pattern. The substrate processing method includes a first step of supplying a first processing medium including a supercritical medium on a substrate and cleaning a film including a metal on a surface of the substrate; and a second step of supplying a second processing medium including the supercritical medium on the substrate, and forming a copper film.Type: ApplicationFiled: July 27, 2005Publication date: November 24, 2005Inventors: Eiichi Kondoh, Vincent Vezin, Kenichi Kubo, Yoshinori Kureishi, Tomohiro Ohta
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Publication number: 20050227500Abstract: A film is formed on the surface of an electronic device substrate by using plasma based on microwave irradiation via a plane antenna member having a plurality of slits in the presence of a process gas comprising at least a gas containing a film-forming substance and a rare gas. An insulating film capable of forming an electronic device substrate with an insulating film having a good electrical property can be formed.Type: ApplicationFiled: March 31, 2003Publication date: October 13, 2005Applicant: TOKYO ELECTRON LIMITEDInventors: Takuya Sugawara, Yoshihide Tada, Tomohiro Ohta
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Patent number: 6839457Abstract: This invention relates to a bone measurement method for measuring a bone shape, structure and architecture on the basis of the tomographic images of a test bone or joint, in more detail, to a bone measurement method characterized by having a template image extraction step for obtaining a wholly continued template image of a bone inner portion surrounded by a cortical bone from the binary image of a test bone cross section, and separating a cortical bone and a cancellous bone by the product of said template image and said binary image, as a bone measurement method which enables the automatic, high-speed and repeatable separation of a cortical bone and a cancellous bone on the basis of the binary image of a test bone or joint cross section and by which a separated three-dimensional image of the cortical bone portion and the cancellous bone portion is obtained as the bases for a non-invasive analyses of three-dimensional bone structure, bone strength, and the like.Type: GrantFiled: June 2, 2000Date of Patent: January 4, 2005Assignee: Teijin LimitedInventors: Yoshiaki Azuma, Yoshifumi Harada, Norihiro Yamada, Tsutomu Maeda, Tomohiro Ohta
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Publication number: 20040253777Abstract: A process gas constituted by a compound having a ring structure in its molecules is introduced into a chamber (12). In the meantime, an excitation gas such as argon, etc. is excited by an activator (34) and introduced into the chamber (12), so that the process gas is excited. The excited process gas is deposited on a process target substrate (19), forming a porous low dielectric constant film having ring structures in the film.Type: ApplicationFiled: February 27, 2004Publication date: December 16, 2004Inventors: Hidenori Miyoshi, Masahito Sugiura, Yusaku Kashiwagi, Yoshihisa Kagawa, Tomohiro Ohta
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Patent number: 6747748Abstract: In a process of forming a film on a surface of a wafer by thermal processing, laser light generated by a light source is depolarized by a depolarizer and the deporlarized light is irradiated upon the surface of wafer. As for the light reflected from the surface of wafer, polarization components in predetermined two directions perpendicular to each other are extracted by a beam splitter, and optical sensors receive the extracted light components to detect each intensity. An analytical processing unit determines a thickness of a formed film based on a change in a difference in intensity.Type: GrantFiled: October 10, 2001Date of Patent: June 8, 2004Assignee: Tokyo Electron LimitedInventors: Tatsuo Matsudo, Tomohiro Ohta, Tetsuji Yasuda, Masakazu Ichikawa, Takashi Nakayama
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Publication number: 20040015105Abstract: The present invention provides an apparatus and a method for treating joint diseases. In order to lower a matrix metalloprotease (MMP) activity which has been enhanced in accompany with a joint disease such as osteoarthritis or rheumatoid arthritis, and to improve the joint disease, the apparatus lowers the MMP activity at the joint site by applying ultrasonic waves on it. The apparatus is a means provided with at least an ultrasonic transducer, an ultrasonic generator and a means for mounting the ultrasonic transducer on the joint site, and applying ultrasonic waves having a frequency of 1.3 to 2 MHz, a repeating frequency of 100 to 1,000 Hz, a burst width of 10 to 2,000 &mgr;s and an intensity of 100 mW/cm2 or less (SATA: Spatial Average-Temporal Average).Type: ApplicationFiled: April 30, 2003Publication date: January 22, 2004Inventors: Masaya Ito, Yoshiaki Azuma, Tomohiro Ohta, Satoshi Takaichi, Seiichiro Suzuki
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Publication number: 20020115304Abstract: In a process of forming a film on a surface of a wafer by thermal processing, laser light generated by a light source is depolarized by a depolarizer and the deporlarized light is irradiated upon the surface of wafer As for the light reflected from the surface of wafer, polarization components in predetermined two directions perpendicular to each other are extracted by a beam splitter, and optical sensors receive the extracted light components to detect each intensity. An analytical processing unit determines a thickness of a formed film based on a change in a difference in intensity.Type: ApplicationFiled: October 10, 2001Publication date: August 22, 2002Inventors: Tatsuo Matsudo, Tomohiro Ohta, Tetsuji Yasuda, Masakazu Ichikawa, Tkashi Nakayama
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Patent number: 6063703Abstract: A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connecting holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage.Type: GrantFiled: May 19, 1998Date of Patent: May 16, 2000Assignee: Kawasaki Steel CorporationInventors: Hiroshi Shinriki, Takeshi Kaizuka, Nobuyuki Takeyasu, Tomohiro Ohta, Eiichi Kondoh, Hiroshi Yamamoto, Tomoharu Katagiri, Tadashi Nakano, Yumiko Kawano
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Patent number: 6001736Abstract: An insulating layer is provided on a semiconductor substrate, a contact hole is formed in the insulating layer, and an underlying metal film is provided on a whole surface of the substrate including inner walls of the contact hole. A surface condition of the underlying metal film is adjusted by a hydrogen plasma treatment. By the hydrogen plasma treatment, a surface of the underlying metal film is hydrogenated and is sputter-etched, so that a disordered film and contaminants adsorbed on the surface of the underlying metal film are removed. Next, aluminum is deposited on the underlying metal film by a chemical vapor deposition process using an organic aluminum compound such as DMAH. The contact hole can be effectively filled with aluminum.Type: GrantFiled: March 4, 1996Date of Patent: December 14, 1999Assignees: Kawasaki Steel Corporation, Tokyo Electron LimitedInventors: Eiichi Kondo, Nobuyuki Takeyasu, Tomohiro Ohta, Yumiko Kawano, Takeshi Kaizuka, Shinpei Jinnouchi
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Patent number: 5998522Abstract: A coating solution for forming an insulating film used in production of semiconductor devices includes siloxanes represented by a general formula:[SiR.sub.3 O.sub.1/2 ].sub.k [SiR.sub.2 O.sub.2/2 ].sub.l [SiRO.sub.3/2 ].sub.m [SiO.sub.4/2 ].sub.nwhere each of k, l, m and n is an integer, R may be the same or different and represents at least one organic group, and a ratio of (3k+21+m) to (k+l+m+n) is between about 0.8 and about 1.3. The present invention further relates to a method for preparing the coating solution, and a method for forming the insulating film using the coating solution, including the steps of coating the coating solution on a surface of a substrate of the semiconductor device to form a coated film, fluidizing the coated film at a temperature between about 150.degree. C. to about 300.degree. C. to planarize the surface of the substrate, and curing the fluidized coated film to form the insulating film.Type: GrantFiled: March 17, 1998Date of Patent: December 7, 1999Assignee: Kawasaki Steel CorporationInventors: Tadashi Nakano, Makoto Shimura, Tomohiro Ohta
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Patent number: 5973402Abstract: A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connection holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage.Type: GrantFiled: January 30, 1997Date of Patent: October 26, 1999Assignee: Kawasaki Steel CorporationInventors: Hiroshi Shinriki, Takeshi Kaizuka, Nobuyuki Takeyasu, Tomohiro Ohta, Eiichi Kondoh, Hiroshi Yamamoto, Tomoharu Katagiri, Tadashi Nakano, Yumiko Kawano
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Patent number: 5952723Abstract: A semiconductor device has a multilevel interconnection structure that includes an insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and at least one via hole. The via plug partially fills the via hole, and the upper surface of the via plug may have a convex shape or a surface of the lower wiring layer at a bottom of the via hole may have a concave shape. Where two via holes are present, one via plug substantially fills the shallowest via hole, and partially fills the deepest via hole. The upper wiring layer may be formed over the via plug to fill a remaining portion of the via hole not filled by the via plug.Type: GrantFiled: March 27, 1997Date of Patent: September 14, 1999Assignee: Kawasaki Steel CorporationInventors: Nobuyuki Takeyasu, Hiroshi Yamamoto, Yumiko Kawano, Eiichi Kondoh, Tomoharu Katagiri, Tomohiro Ohta
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Patent number: 5946799Abstract: In a multilevel interconnect structure for use in a semiconductor device including a lower metal wiring having an aluminum or aluminum alloy film and a high melting point metal or high melting metal alloy film, an interlayer insulating film deposited on the lower metal wiring, a via hole formed in the interlayer insulating film, a plug made of aluminum or aluminum alloy and formed in the via hole, and an upper metal wiring having an aluminum or aluminum alloy film and a high melting point metal or high melting point metal alloy film, said plug is directly contacted with the aluminum or aluminum alloy film of at least one of the lower and upper metal wirings to decrease the via resistance without reducing the electromigration reliability.Type: GrantFiled: December 18, 1996Date of Patent: September 7, 1999Assignee: Kawasaki Steel CorporationInventors: Hiroshi Yamamoto, Tomohiro Ohta, Nobuyuki Takeyasu
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Patent number: 5840821Abstract: A coating solution for forming an insulating film used in production of semiconductor devices includes siloxanes represented by a general formula:?SiR.sub.3 O.sub.1/2 !.sub.k ?SiR.sub.2 O.sub.2/2 !.sub.l ?SiRO.sub.3/2 !.sub.m ?SiO.sub.4/2 !.sub.nwhere each of k, l, m and n is an integer, R may be the same or different and represents at least one organic group, and a ratio of (3k+2l+m) to (k+l+m+n) is between about 0.8 and about 1.3. The present invention further relates to a method for preparing the coating solution, and a method for forming the insulating film using the coating solution, including the steps of coating the coating solution on a surface of a substrate of the semiconductor device to form a coated film, fluidizing the coated film at a temperature between about 150.degree. C. to about 300.degree. C. to planarize the surface of the substrate, and curing the fluidized coated film to form the insulating film.Type: GrantFiled: November 21, 1995Date of Patent: November 24, 1998Assignee: Kawasaki Steel CorporationInventors: Tadashi Nakano, Makoto Shimura, Tomohiro Ohta
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Patent number: 5679974Abstract: An antifuse element for a semiconductor device, comprising a bottom electrode made from a conductive material containing a refractory metal and a top electrode made from a conductive material containing a fusible metal. The fusible metal is Al, Al alloy, Cu or Ag. The Al alloy contains at least Si, Cu, Sc, Pd, Ti, Ta or Nb. The refractory metal is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo or W. Silicides are most preferable as the refractory metal. The semiconductor device is programmed by making the top electrode negative or positive and by applying a breakdown voltage between the bottom and top electrodes so as to break down an antifuse material layer, thereby obtaining a filament. The filament is made from the fusible metal from the top electrode and the refractory metal from the bottom electrode. Thus, the filament has a low resistance, and a good EM resistance.Type: GrantFiled: December 5, 1994Date of Patent: October 21, 1997Assignee: Kawasaki Steel CorporationInventors: Hiroshi Shinriki, Yoshimitsu Tamura, Tomohiro Ohta