Patents by Inventor Tomohiro Taira

Tomohiro Taira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240004185
    Abstract: A movable device includes a movable portion and a drive structure configured to drive the movable portion. The movable device includes a support frame that surrounds the movable portion and supports the drive structure. The movable device includes electrodes electrically coupled to the drive structure. The movable device includes pseudo electrodes electrically isolated from the drive structure. The electrodes and the pseudo electrodes are provided on the support frame.
    Type: Application
    Filed: June 26, 2023
    Publication date: January 4, 2024
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventor: Tomohiro TAIRA
  • Patent number: 10384753
    Abstract: The present invention is to provide a launcher for an underwater vehicle by which thrust force of a mover arranged movably in a water conducting tube can efficiently be obtained. The mover forms a plurality of magnetic circuits in which magnetic flux generated by a plurality of permanent magnets flows, and the plurality of magnetic circuits includes a first magnetic circuit in which the magnetic flux flows through one of a pair of circumferential magnets, a second magnetic circuit in which the magnetic flux flows through one of a pair of axial magnets, the second magnetic circuit being formed in parallel to the first magnetic circuit, and a third magnetic circuit in which the magnetic flux flows through a radial magnet, the third magnetic circuit being formed in parallel to the first magnetic circuit and the second magnetic circuit, respectively.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: August 20, 2019
    Assignee: Kobe Steel, Ltd.
    Inventors: Ryo Shimada, Hiroyoshi Matsui, Tomohiro Taira, Hiroshi Hashimoto, Shumpei Hayashi
  • Publication number: 20190144091
    Abstract: The present invention is to provide a launcher for an underwater vehicle by which thrust force of a mover arranged movably in a water conducting tube can efficiently be obtained. The mover forms a plurality of magnetic circuits in which magnetic flux generated by a plurality of permanent magnets flows, and the plurality of magnetic circuits includes a first magnetic circuit in which the magnetic flux flows through one of a pair of circumferential magnets, a second magnetic circuit in which the magnetic flux flows through one of a pair of axial magnets, the second magnetic circuit being formed in parallel to the first magnetic circuit, and a third magnetic circuit in which the magnetic flux flows through a radial magnet, the third magnetic circuit being formed in parallel to the first magnetic circuit and the second magnetic circuit, respectively.
    Type: Application
    Filed: October 15, 2018
    Publication date: May 16, 2019
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Ryo SHIMADA, Hiroyoshi MATSUI, Tomohiro TAIRA, Hiroshi HASHIMOTO, Shumpei HAYASHI
  • Publication number: 20180230678
    Abstract: A work machine control system includes a shape detection unit and a construction information generation unit. The shape detection unit detects an object to be constructed and outputs shape information representing a three-dimensional shape of the object. The construction information generation unit acquires the shape information from the shape detection unit and determines, using the shape information, target construction information as a target of construction of the object to be constructed.
    Type: Application
    Filed: October 5, 2016
    Publication date: August 16, 2018
    Inventors: Tomohiro Taira, Nao Asada, Kentaro Takayama
  • Patent number: 8160724
    Abstract: An information processing apparatus which is capable of executing applications includes first control means for controlling a system of the information processing apparatus and second control means for controlling the execution of the applications, and the second control means has state transition control means for defining states of application not dependent on the system and controlling transitions of the defined states and conversion means for converting a command into a format which can be recognized by the system when the command instructing a state transition to the state transition control means is issued.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: April 17, 2012
    Assignee: Sony Corporation
    Inventors: Shimon Sakai, Naoki Ode, Tomohiro Taira, Yuji Ishimura
  • Publication number: 20110040551
    Abstract: An information processing apparatus which is capable of executing applications includes first control means for controlling a system of the information processing apparatus and second control means for controlling the execution of the applications, and the second control means has state transition control means for defining states of application not dependent on the system and controlling transitions of the defined states and conversion means for converting a command into a format which can be recognized by the system when the command instructing a state transition to the state transition control means is issued.
    Type: Application
    Filed: October 25, 2010
    Publication date: February 17, 2011
    Applicant: SONY CORPORATION
    Inventors: Shimon Sakai, Naoki Ode, Tomohiro Taira, Yuji Ishimura
  • Patent number: 7853334
    Abstract: An information processing apparatus which is capable of executing applications includes first control means for controlling a system of the information processing apparatus and second control means for controlling the execution of the applications, and the second control means has state transition control means for defining states of application not dependent on the system and controlling transitions of the defined states and conversion means for converting a command into a format which can be recognized by the system when the command instructing a state transition to the state transition control means is issued.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: December 14, 2010
    Assignee: Sony Corporation
    Inventors: Shimon Sakai, Naoki Ode, Tomohiro Taira, Yuji Ishimura
  • Publication number: 20090275730
    Abstract: There is provided a temperature responsive polymer compound which comprises a repeating unit represented by the following general formula (I): —R1-Hmb-R2—??(I) where, Hmb represents a valic acid residue represented by the following formula (II); R1 represents an amino acid, a polypeptide, or a hydroxy acid being linked by ester bond; R2 represents an amino acid or a polypeptide being linked by amide bond or a hydroxy acid being linked by ester bond: and wherein said polymer compound has 18 or more of amino acids residues and hydroxy acid residues in total.
    Type: Application
    Filed: October 20, 2005
    Publication date: November 5, 2009
    Inventors: Hiroyuki Oku, Kazuaki Shichiri, Tomohiro Taira, Aya Inoue, Keiichi Yamada, Ryoichi Katakai
  • Publication number: 20070093914
    Abstract: An information processing apparatus which is capable of executing applications includes first control means for controlling a system of the information processing apparatus and second control means for controlling the execution of the applications, and the second control means has state transition control means for defining states of application not dependent on the system and controlling transitions of the defined states and conversion means for converting a command into a format which can be recognized by the system when the command instructing a state transition to the state transition control means is issued.
    Type: Application
    Filed: August 16, 2006
    Publication date: April 26, 2007
    Applicant: Sony Corporation
    Inventors: Shimon Sakai, Naoki Ode, Tomohiro Taira, Yuji Ishimura
  • Patent number: 6974710
    Abstract: A method of fabricating a semiconductor integrated circuit device includes performing a wafer process to a plurality of wafers so as to form a plurality of semiconductor integrated circuit devices over each of the wafers, performing a first electrical test to a first set of wafers selected from the plurality of wafers formed in the wafer process and accommodated in a first wafer cassette placed in a wafer prober, and performing a second electrical test to a second set of wafers selected from the plurality of wafers formed in the wafer process and accommodated in a second wafer cassette placed in the wafer prober by automatically changing a test object to the second set of wafers.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: December 13, 2005
    Assignees: Renesas Technology Corp., Hitachi Hokkai Semiconductor, Ltd.
    Inventor: Tomohiro Taira
  • Publication number: 20040092049
    Abstract: A method of fabricating a semiconductor integrated circuit device includes performing a wafer process to a plurality of wafers so as to form a plurality of semiconductor integrated circuit devices over each of the wafers, performing a first electrical test to a first set of wafers selected from the plurality of wafers formed in the wafer process and accommodated in a first wafer cassette placed in a wafer prober, and performing a second electrical test to a second set of wafers selected from the plurality of wafers formed in the wafer process and accommodated in a second wafer cassette placed in the wafer prober by automatically changing a test object to the second set of wafers.
    Type: Application
    Filed: September 26, 2003
    Publication date: May 13, 2004
    Inventor: Tomohiro Taira
  • Patent number: 6638779
    Abstract: A probe inspection system is used in integrated circuit fabrication and testing, using a network, including probers, testers, manufacturing specification management, testing step control and test results management, which has a modified prober software. Lots are set successively to cassettes, and when the lot in another cassette is set after the end of processing of the lot in one cassette, processing of the next lot is executed automatically. Continuous lot inspection can be effected by repeating these operations. Even during processing of the next lot, it is always possible to change lot in the processing-completed cassette and input data, such as lot No. In probe check in wafer testing, it is possible to diminish the working load and the waiting of workers in the lot change, reduce the number of cassettes and improve the working efficiency of testers.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: October 28, 2003
    Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventor: Tomohiro Taira
  • Publication number: 20020132381
    Abstract: Semiconductor integrated circuit device fabricating method and testing method are provided. A probe inspection system is used wherein a network including probers, testers, manufacturing specification management, testing step control and test results management is constructed and which has a modified prober software. Lots are set successively to cassettes, and when the lot in the other cassette is set after the end of processing of the lot in one cassette, the processing of the next lot is executed automatically. A continuous lot inspection can be effected by repeating these operations. Even during processing of the next lot, it is always possible to change lot in the processing-completed cassette and input data such as lot No. In probe check in a wafer testing step it is possible to diminish the working load and wait of workers in lot change, reduce the number of cassettes and improve the working efficiency of testers.
    Type: Application
    Filed: March 14, 2002
    Publication date: September 19, 2002
    Inventor: Tomohiro Taira