Patents by Inventor Tomohisa Iino
Tomohisa Iino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220028739Abstract: A semiconductor device according to an embodiment includes: a barrier metal layer provided on a surface of an insulating layer; and a conductive layer having a first metal layer provided on a surface of the barrier metal layer, and a second metal layer provided on a surface of the first metal layer. The second metal layer includes an identical metal to metal of the first metal layer, and an impurity configured to remove fluorine bonded to the metal.Type: ApplicationFiled: October 6, 2021Publication date: January 27, 2022Applicant: Kioxia CorporationInventors: Satoshi WAKATSUKI, Tomohisa IINO, Naomi FUKUMAKI, Misuzu SATO, Masakatsu TAKEUCHI
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Publication number: 20210082753Abstract: A semiconductor device according to an embodiment includes: a barrier metal layer provided on a surface of an insulating layer; and a conductive layer having a first metal layer provided on a surface of the barrier metal layer, and a second metal layer provided on a surface of the first metal layer. The second metal layer includes an identical metal to metal of the first metal layer, and an impurity configured to remove fluorine bonded to the metal.Type: ApplicationFiled: March 10, 2020Publication date: March 18, 2021Applicant: Kioxia CorporationInventors: Satoshi WAKATSUKI, Tomohisa IINO, Naomi FUKUMAKI, Misuzu SATO, Masakatsu TAKEUCHI
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Publication number: 20210010134Abstract: According to an embodiment, a semiconductor manufacturing apparatus includes a chamber, a process gas nozzle, an inert gas nozzle and a hydrogen radical nozzle. The chamber houses at least one substrate. The process gas nozzle is to release process gas toward the substrate in the chamber. The inert gas nozzle is to release inert gas toward the substrate in the chamber. The hydrogen radical nozzle is disposed in the chamber and is to generate hydrogen radicals by heating raw material gas including hydrogen and to release the generated hydrogen radicals toward the substrate during the release of the inert gas. A metal wire is in the hydrogen radical nozzle, and the metal wire includes a metal catalyst for exciting the generation of the hydrogen radicals.Type: ApplicationFiled: September 22, 2020Publication date: January 14, 2021Applicant: Toshiba Memory CorporationInventors: Fumiki Aiso, Kensei Takahashi, Tomohisa Iino
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Patent number: 10854488Abstract: A wafer conveying apparatus conveying a wafer onto a supporting table in manufacturing a semiconductor. A first arm retains the wafer to move to an upper region of the supporting table, and is retracted from the upper region of the supporting table after the wafer is elevated. A second arm contacts the wafer by an opening provided in the supporting table to elevate the wafer, and lowers the wafer to place the wafer on the supporting table.Type: GrantFiled: July 26, 2019Date of Patent: December 1, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fumiki Aiso, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
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Patent number: 10669621Abstract: According to the embodiment, a vaporization system includes a vaporizer, a body, a sensor, a moving mechanism, and a supplier. The vaporizer includes a plurality of containers which can store powdered solid materials. The body in a vacuum state can house the vaporizer. The sensor detects a residue of the solid materials stored in a plurality of the containers respectively. The moving mechanism, on the basis of a detection result of the sensor, moves the plurality of the containers respectively between a first position located inside the vaporizer, and a second position located outside of the vaporizer. A supplier supplies the solid material to the container located in the second position among the plurality of the containers.Type: GrantFiled: February 13, 2017Date of Patent: June 2, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fumiki Aiso, Hajime Nagano, Kensei Takahashi, Tomohisa Iino
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Publication number: 20190348314Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a container to contain wafers, and supporting tables provided in the container so as to be stacked on one another, and each including a supporting face that comes into contact with a wafer to support the wafer. The apparatus further includes supporting columns to join the supporting tables together and provided at positions where the supporting columns are contained inside outer circumferences of the supporting tables. The apparatus further includes a gas feeder to feed a gas to the wafers on the supporting tables, and a gas discharger to discharge the gas fed to the wafers on the supporting tables. Each of the supporting tables includes a first upper face as the supporting face, and a second upper face provided so as to surround the first upper face at a level higher than a level of the first upper face.Type: ApplicationFiled: July 26, 2019Publication date: November 14, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Fumiki AISO, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
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Patent number: 10403531Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a container to contain wafers, and supporting tables provided in the container so as to be stacked on one another, and each including a supporting face that comes into contact with a wafer to support the wafer. The apparatus further includes supporting columns to join the supporting tables together and provided at positions where the supporting columns are contained inside outer circumferences of the supporting tables. The apparatus further includes a gas feeder to feed a gas to the wafers on the supporting tables, and a gas discharger to discharge the gas fed to the wafers on the supporting tables. Each of the supporting tables includes a first upper face as the supporting face, and a second upper face provided so as to surround the first upper face at a level higher than a level of the first upper face.Type: GrantFiled: March 8, 2018Date of Patent: September 3, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fumiki Aiso, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
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Publication number: 20190071771Abstract: According to an embodiment, a semiconductor manufacturing apparatus includes a chamber, a process gas nozzle, an inert gas nozzle and a hydrogen radical nozzle. The chamber houses at least one substrate. The process gas nozzle is to release process gas toward the substrate in the chamber. The inert gas nozzle is to release inert gas toward the substrate in the chamber. The hydrogen radical nozzle is disposed in the chamber and is to generate hydrogen radicals by heating raw material gas including hydrogen and to release the generated hydrogen radicals toward the substrate during the release of the inert gas. A metal wire is in the hydrogen radical nozzle, and the metal wire includes a metal catalyst for exciting the generation of the hydrogen radicals.Type: ApplicationFiled: March 13, 2018Publication date: March 7, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Fumiki AISO, Kensei TAKAHASHI, Tomohisa IINO
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Publication number: 20190067066Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a container to contain wafers, and supporting tables provided in the container so as to be stacked on one another, and each including a supporting face that comes into contact with a wafer to support the wafer. The apparatus further includes supporting columns to join the supporting tables together and provided at positions where the supporting columns are contained inside outer circumferences of the supporting tables. The apparatus further includes a gas feeder to feed a gas to the wafers on the supporting tables, and a gas discharger to discharge the gas fed to the wafers on the supporting tables. Each of the supporting tables includes a first upper face as the supporting face, and a second upper face provided so as to surround the first upper face at a level higher than a level of the first upper face.Type: ApplicationFiled: March 8, 2018Publication date: February 28, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Fumiki AISO, Ryota FUJITSUKA, Kensei TAKAHASHI, Takayuki MATSUI, Tomohisa IINO
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Publication number: 20180277406Abstract: According to an embodiment, a substrate treatment apparatus includes a vacuum chamber, a cylindrical member, a gas feed member, a support member and a plurality of plate members. The cylindrical member is disposed in the vacuum chamber and includes a gas outlet. The support member supports a plurality of treated substrates in a stacked state in the cylindrical member. The plurality of plate members are supported on the support member and include a patterned surface or an outer circumferential part outside the treated substrate.Type: ApplicationFiled: September 8, 2017Publication date: September 27, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Koji NAKAHARA, Tomohisa IINO, Ryota FUJITSUKA
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Patent number: 8304021Abstract: A vapor phase deposition apparatus 100 for forming a thin film comprising a chamber 1060, a piping unit 120 for supplying a source material of the thin film into the chamber 1060 in a gaseous condition, a vaporizer 202 for vaporizing the source material in a source material container 112 and supplying the vaporized gas in the piping unit 120 and a temperature control unit 180, is presented.Type: GrantFiled: September 17, 2009Date of Patent: November 6, 2012Assignee: Renesas Electronics CorporationInventors: Tomoe Yamamoto, Tomohisa Iino
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Publication number: 20100003832Abstract: A vapor phase deposition apparatus 100 for forming a thin film comprising a chamber 1060, a piping unit 120 for supplying a source material of the thin film into the chamber 1060 in a gaseous condition, a vaporizer 202 for vaporizing the source material in a source material container 112 and supplying the vaporized gas in the piping unit 120 and a temperature control unit 180, is presented.Type: ApplicationFiled: September 17, 2009Publication date: January 7, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Tomoe YAMAMOTO, Tomohisa IINO
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Patent number: 7608502Abstract: In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T?20) (degree C.) to (T+20) (degree C.) (S104 to S112).Type: GrantFiled: August 19, 2005Date of Patent: October 27, 2009Assignee: NEC Electronics CorporationInventors: Tomohisa Iino, Naomi Fukumaki, Yoshitake Kato, Tomoe Yamamoto
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Publication number: 20090217873Abstract: An atomic layer deposition apparatus includes: a metal source gas supply tube, disposed in a side of a wafer to extend over the entire surface of the wafer, and capable of being supplied with a source gas from a first end to a second end; and an active gas supply tube, disposed in a side of a wafer to extend over the entire surface of the wafer, and capable of being supplied with a source gas from a first end to a second end, wherein the active gas supply tube is provided with a plurality of gas blow openings for blowing the active gas that is active over the wafer, and wherein the gas blow openings are disposed with gradually reduced inter-opening distances as being further from the first end to the second end of the active gas supply tube.Type: ApplicationFiled: February 13, 2009Publication date: September 3, 2009Applicant: NEC ELECTRONICS CORPORATIONInventors: Tomohisa Iino, Naomi Fukumaki, Yoshitake Kato
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Publication number: 20060046421Abstract: In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T?20) (degree C.) to (T+20) (degree C.) (S104 to S112).Type: ApplicationFiled: August 19, 2005Publication date: March 2, 2006Inventors: Tomohisa Iino, Naomi Fukumaki, Yoshitake Kato, Tomoe Yamamoto
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Publication number: 20050268853Abstract: A vapor phase deposition apparatus 100 for forming a thin film comprising a chamber 1060, a piping unit 120 for supplying a source material of the thin film into the chamber 1060 in a gaseous condition, a vaporizer 202 for vaporizing the source material in a source material container 112 and supplying the vaporized gas in the piping unit 120 and a temperature control unit 180, is presented.Type: ApplicationFiled: June 1, 2005Publication date: December 8, 2005Inventors: Tomoe Yamamoto, Tomohisa Iino