Patents by Inventor Tomohisa Okimoto

Tomohisa Okimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8400254
    Abstract: A surge absorbing element has a first electrode, a second electrode, and a ceramic layer. The second electrode is opposed to the first electrode. The ceramic layer has a polycrystal structure including a plurality of crystal grains showing voltage nonlinearity, and is at least partially brought into contact with the first electrode and the second electrode. The ceramic layer has a void inside therein, and surface discharge is generated on surfaces, exposed to the void, of the crystal grains, whereby electric conduction is attained between the first and second electrodes.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: March 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Eiichi Koga, Noriko Sawada, Mikinori Amisawa, Seiichi Minami, Hirofumi Yamada, Tomohisa Okimoto
  • Publication number: 20110304946
    Abstract: A surge absorbing element has a first electrode, a second electrode, and a ceramic layer. The second electrode is opposed to the first electrode. The ceramic layer has a polycrystal structure including a plurality of crystal grains showing voltage nonlinearity, and is at least partially brought into contact with the first electrode and the second electrode. The ceramic layer has a void inside therein, and surface discharge is generated on surfaces, exposed to the void, of the crystal grains, whereby electric conduction is attained between the first and second electrodes.
    Type: Application
    Filed: April 13, 2010
    Publication date: December 15, 2011
    Inventors: Eiichi Koga, Noriko Sawada, Mikinori Amisawa, Seiichi Minami, Hirofumi Yamada, Tomohisa Okimoto
  • Publication number: 20060158824
    Abstract: A composite electronic component which can adjust a capacitance obtained due to an overlap of inner layer capacitor electrode parts sandwiching dielectric sheets by changing an overlapping area of the inner layer capacitor electrode parts, and in which an identification mark has been provided lower than a height of an external electrode of a laminated body, whereby an adjustment of an electric capacitance is easy and, by the fact that the identification mark does not protrude, a mounting performance when the composite electronic component is mounted by being sucked by a suction nozzle is improved.
    Type: Application
    Filed: March 3, 2004
    Publication date: July 20, 2006
    Inventors: Keiji Kawajiri, Tomohisa Okimoto, Eiji Koga
  • Patent number: D492267
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: June 29, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiji Kawajiri, Tomohisa Okimoto, Eiichi Koga