Patents by Inventor Tomohito KAWASHIMA

Tomohito KAWASHIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230371406
    Abstract: A memory device, containing a first interconnection extending in a first direction; a first layer including tungsten nitride provided on the first interconnection; a stacked body layer provided on the first layer, a second layer including tungsten provided on the stacked body layer, a memory cell including a germanium tellurium antimony provided on the second layer, a second interconnection provided above the memory cell and extending in a second direction intersecting the first direction; and a third layer including tungsten disposed between the memory cell and the second interconnection, wherein the stacked body layer contains a first material layer of a first material which is different from a material of the first layer, and a second material layer including a second material which is different from the first material and the material of the first layer, wherein the second layer covers a lower surface of the memory cell, and wherein the third layer covers an upper surface of the memory cell.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 16, 2023
    Applicant: Kioxia Corporation
    Inventors: Tomohito KAWASHIMA, Takahiro NONAKA, Yusuke ARAYASHIKI, Takayuki ISHIKAWA
  • Patent number: 11744164
    Abstract: According to one embodiment, a resistive random access memory device includes a first electrode and a second electrode. The resistive random access memory device also includes a resistance change layer connected between the first electrode and the second electrode. The resistive random access memory device also includes a conductive layer connected in series to the resistance change layer between the first electrode and the second electrode. The resistive random access memory device in which the conductive layer includes a plurality of first material layers including a first material and a plurality of second material layers including a second material which is different from the first material.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: August 29, 2023
    Assignee: Kioxia Corporation
    Inventors: Tomohito Kawashima, Takahiro Nonaka, Yusuke Arayashiki, Takayuki Ishikawa
  • Publication number: 20160260779
    Abstract: According to one embodiment, a resistive random access memory device includes a first wiring extending in a first direction, a first ion source layer provided in a first portion on the first wiring and a first variable resistance layer provided on the first ion source layer. The resistive random access memory device also includes a second wiring, which is provided on the first variable resistance layer, faces the first portion, and extends in a second direction different from the first direction. The resistive random access memory device also includes a second variable resistance layer provided in a second portion on the second wiring, a second ion source layer provided on the second variable resistance layer and a third wiring, which is provided on the second ion source layer, faces the second portion, and extends in the first direction.
    Type: Application
    Filed: June 25, 2015
    Publication date: September 8, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomohito KAWASHIMA, Shosuke FUJII
  • Publication number: 20160064661
    Abstract: According to one embodiment, a resistive random access memory device includes a first electrode and a second electrode. The resistive random access memory device also includes a resistance change layer connected between the first electrode and the second electrode. The resistive random access memory device also includes a conductive layer connected in series to the resistance change layer between the first electrode and the second electrode. The resistive random access memory device in which the conductive layer includes a plurality of first material layers including a first material and a plurality of second material layers including a second material which is different from the first material.
    Type: Application
    Filed: February 25, 2015
    Publication date: March 3, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomohito KAWASHIMA, Takahiro NONAKA, Yusuke ARAYASHIKI, Takayuki ISHIKAWA
  • Patent number: 9276205
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: March 1, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Hidenori Miyagawa, Tomohito Kawashima
  • Publication number: 20150228892
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Application
    Filed: April 22, 2015
    Publication date: August 13, 2015
    Inventors: Yusuke ARAYASHIKI, Hidenori MIYAGAWA, Tomohito KAWASHIMA
  • Patent number: 9040953
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Grant
    Filed: March 2, 2014
    Date of Patent: May 26, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Hidenori Miyagawa, Tomohito Kawashima
  • Publication number: 20150076435
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Application
    Filed: March 2, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke ARAYASHIKI, Hidenori MIYAGAWA, Tomohito KAWASHIMA
  • Publication number: 20110223319
    Abstract: An aspect of the present disclosure, there is provided a method of fabricating an organic electroluminescence display device, including forming a plurality of first electrodes with a prescribed interval on a substrate, forming a light emission function layer including a light emission layer on at least an upper surface of each of the first electrodes, forming a barrier layer on a upper surface of the light emission function layer between the first electrodes after forming the light emission function layer, forming a second electrode on the first electrode.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomohito KAWASHIMA, Junichi Tonotani