Patents by Inventor Tomoji Terakado
Tomoji Terakado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240030683Abstract: The present invention enables single mode light to be stably output while also enabling the intensity thereof to be increased, and is a distributed feedback type of semiconductor laser element in which a diffraction grating is formed on a waveguide. The waveguide includes a diffraction grating portion where the diffraction grating is formed, and a flat portion having a region where the diffraction grating is not formed and whose width is broader than the diffraction grating portion. The flat portion has a connecting portion having a region whose width changes continuously approaching a connection location with the diffraction grating portion, and a high-reflection film is provided on an end surface of the flat portion that is on an opposite side from the connecting portion, while an anti-reflection film is provided on an end surface of the diffraction grating portion that is on an opposite side from the connecting portion.Type: ApplicationFiled: December 2, 2021Publication date: January 25, 2024Applicant: HORIBA, LTD.Inventors: Makoto MATSUHAMA, Tomoji TERAKADO, Yusuke AWANE
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Patent number: 11374380Abstract: Provided is a semiconductor laser including: a core layer having an active layer and a diffraction grating layer optically coupled to the active layer; and paired clad layers arranged sandwiching the core layer, and formed with a waveguide along the core layer, and the semiconductor laser includes: a flat layer provided continuously with the diffraction grating layer along the waveguide; and a temperature control mechanism for controlling the temperature of the flat layer to a temperature different from that of the diffraction grating layer.Type: GrantFiled: September 14, 2018Date of Patent: June 28, 2022Assignee: HORIBA, Ltd.Inventors: Tomoji Terakado, Makoto Matsuhama, Kyoji Shibuya
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Publication number: 20210006037Abstract: Provided is a semiconductor laser including: a core layer having an active layer and a diffraction grating layer optically coupled to the active layer; and paired clad layers arranged sandwiching the core layer, and formed with a waveguide along the core layer, and the semiconductor laser includes: a flat layer provided continuously with the diffraction grating layer along the waveguide; and a temperature control mechanism for controlling the temperature of the flat layer to a temperature different from that of the diffraction grating layer.Type: ApplicationFiled: September 14, 2018Publication date: January 7, 2021Inventors: Tomoji Terakado, Makoto Matsuhama, Kyoji Shibuya
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Patent number: 5825047Abstract: An optical semiconductor device comprises a stripe-mesa structure provided on a semi-insulating substrate. The stripe-mesa structure comprises an undoped light absorption layer sandwiched by cladding layers, and by burying layers on both sides. With this structure, the device capacitance is decreased to provide wide bandwidth and ultra-high speed operation properties. This device can be applied to an optical modulator, an integrated type optical modulator, and an optical detector.Type: GrantFiled: September 16, 1994Date of Patent: October 20, 1998Assignee: NEC CorporationInventors: Akira Ajisawa, Tomoji Terakado, Masayuki Yamaguchi, Keiro Komatsu
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Patent number: 5636237Abstract: In a laser device in which a first cladding layer (11b) of InP of p-type, an active layer (12) of InGaAsP, and a second cladding layer (13) of InP of n-type are successively formed on a predetermined area of a base layer (10, 11a) of InP of p-type, a current confining structure includes, to confine a current in the active layer, a pair of first buried layers (14) of InP of p-type on a remaining area of the base layer, a pair of first current blocking layers (15) of InP of n-type on the pair of first buried layers, a pair of second current blocking layers (16) of a semi-insulating InP on the pair of first current blocking layers, and a second buried layer (17) of InP of n-type on the pair of second current blocking layers.Type: GrantFiled: January 30, 1996Date of Patent: June 3, 1997Assignee: NEC CorporationInventors: Tomoji Terakado, Toshitaka Torikai
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Patent number: 5398255Abstract: A semiconductor laser having a mesa stripe structure with two sides thereof buried by layers comprises a p-InP buried layer, a p-InP current blocking layer, an InGaAsP current blocking layer, and an n-InP current blocking layer. The n-InP current blocking layer is electrically independent by being isolated by the p-InP current blocking layer and the p-InP buried layer which are in touch with each other at the two sides of the mesa stripe structure. With this arrangement, the leakage current is reduced enabling to improve temperature characteristics even at a temperature above 85 degrees.Type: GrantFiled: May 31, 1994Date of Patent: March 14, 1995Assignee: NEC CorporationInventor: Tomoji Terakado
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Patent number: 5382543Abstract: In a method of manufacturing a semiconductor device, first strip dielectrics (33) and surfaces (35) were formed by taking first strip parts (31) of a dielectric layer (29) away from a principal surface (13) of a semiconductor substrate (11) in parallel by using a photo-lithography method. Active regions (43) were formed on the first strip surfaces (35) by using a metal organic vapor phase epitaxy method to be covered with lattice planes each of which is (111)B. Second strip dielectrics (35) and surfaces (47) were formed by taking second strip parts (31a) of the first strip dielectrics (31) away from the principal surface (13) with the second strip surfaces (47) positioned between the active regions (43) and the second strip dielectrics (45). Current block regions (57) were formed on the second strip surfaces (47) and the active regions (43) by using the metal organic vapor phase epitaxy method.Type: GrantFiled: July 22, 1993Date of Patent: January 17, 1995Assignee: NEC CorporationInventors: Takahiro Nakamura, Tomoji Terakado
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Patent number: 5329135Abstract: A light emitting device has an indium gallium arsenide phosphide luminescent layer between a first clad layer of n-type indium phosphide and a second clad layer of p-type indium phosphide, and a strained barrier layer of p-type indium aluminum arsenide is inserted between the luminescent layer and the second clad layer so as to increase the potential barrier therebetween, thereby improving the luminous efficiency and the saturation point of the light output.Type: GrantFiled: October 21, 1993Date of Patent: July 12, 1994Assignee: NEC CorporationInventor: Tomoji Terakado
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Patent number: 5309467Abstract: A semiconductor laser having a buried stripe structure is provided, which comprises a first cladding layer of InP, an active layer containing at least an InGaAsP or InGaAs layer, a barrier layer of In.sub.1-x Al.sub.x As (x=0.48 to 1.00), a second cladding layer of InP, a mesa-shaped stripe portion composed of the first cladding layer, active layer, barrier layer and second cladding layer, and a pair of buried layers disposed on both sides of the stripe portion so as to bury the same therebetween formed in this order on an InP substrate. The hetero barrier of conduction band between the active and barrier layers is increased by the barrier layer when an electric current is injected, thus being capable of restricting the electrons injected into the active layer to be leaked to the second cladding layer. It is preferable that a second barrier layer of In.sub.1-x Al.sub.x As (x=0.48 to 1.00) is disposed on each side of the stripe portion.Type: GrantFiled: October 8, 1992Date of Patent: May 3, 1994Assignee: NEC CorporationInventor: Tomoji Terakado
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Patent number: 4829346Abstract: A field-effect transistor comprises a semi-insulating InP substrate, a strained buffer layer of Al.sub.X Ga.sub.1-X As grown on the substrate, and an active layer of GaAs. The active layer is eased in regard to the influence of the lattice mismatching between the active layer and substrate. Such a field-effect transistor is associated with an optical device in a monolithic manner on a common semi-insulating InP substrate.Type: GrantFiled: January 5, 1988Date of Patent: May 9, 1989Assignee: NEC CorporationInventors: Kensuke Kasahara, Tomoji Terakado, Yasumasa Inomoto, Akira Suzuki, Tomohiro Itoh
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Patent number: 4698821Abstract: An integrated light amplifier in which a stripe laser is formed over a substrate and then a vertical phototransistor is formed over the laser. Electrodes are attached to the back of the substrate and to the top of the phototransistor with the phototransistor electrode being formed with a hole so that incident light can reach the phototransistor. Before formation of the substrate electrode, the substrate can be ground to the desired thickness. Photocarriers are detected and multiplied in the phototransistor and injected into the stripe laser. Additional electrodes may be provided over the laser in order to bias the laser independently of the incident light.Type: GrantFiled: May 14, 1985Date of Patent: October 6, 1987Assignee: NEC CorporationInventors: Tomoji Terakado, Yuichi Odagiri