Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.

Abstract: An output port determining apparatus is capable of determining a longest match for a network address without the necessity of processing operations in memory devices. Output ports are connected to networks. An address bus has signal lines corresponding to bits of a node address which uniquely identifies a node as a connection destination. A plurality of memory devices are connected to as many the signal lines as the number of bits of network addresses of the networks, and store port information representing the output ports to output data therefrom at memory addresses corresponding to the network addresses. An address register outputs a received node address to the address bus. A selecting circuit selects the port information stored in one of the memory devices which is connected to the most signal lines, from port information outputted from the memory devices according to the node address, and outputs the selected port information.

Abstract: An output port determining apparatus is capable of determining a longest match for a network address without the necessity of processing operations in memory devices. Output ports are connected to networks. An address bus has signal lines corresponding to bits of a node address which uniquely identifies a node as a connection destination. A plurality of memory devices are connected to as many the signal lines as the number of bits of network addresses of the networks, and store port information representing the output ports to output data therefrom at memory addresses corresponding to the network addresses. An address register outputs a received node address to the address bus. A selecting circuit selects the port information stored in one of the memory devices which is connected to the most signal lines, from the port information outputted from the memory devices according to the node address, and outputs the selected port information.

Abstract: A memory device which prevents lowering of processing efficiency of the entire system during processing for encryption or decryption of data. The first memory circuit stores data which is inputted through an external-bus-connection terminal. The second memory circuit is internally connected to the first memory circuit, acquires a duplicate of the data stored in the first memory circuit, and stores the duplicate of the data. The encryption/decryption circuit is internally connected to the second memory circuit, performs processing for encryption or decryption of the duplicate of the data stored in the second memory circuit, in response to an input of designation of an operation, and returns a result of the processing to the second memory circuit.

Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.