Patents by Inventor Tomokazu Aoki

Tomokazu Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7471690
    Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: December 30, 2008
    Assignee: Fujitsu Limited
    Inventors: Kazuya Asano, Teruhiko Nagatomo, Tomokazu Aoki, Junichi Hashida
  • Patent number: 7464200
    Abstract: An output port determining apparatus is capable of determining a longest match for a network address without the necessity of processing operations in memory devices. Output ports are connected to networks. An address bus has signal lines corresponding to bits of a node address which uniquely identifies a node as a connection destination. A plurality of memory devices are connected to as many the signal lines as the number of bits of network addresses of the networks, and store port information representing the output ports to output data therefrom at memory addresses corresponding to the network addresses. An address register outputs a received node address to the address bus. A selecting circuit selects the port information stored in one of the memory devices which is connected to the most signal lines, from port information outputted from the memory devices according to the node address, and outputs the selected port information.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: December 9, 2008
    Assignee: Fujitsu Limited
    Inventor: Tomokazu Aoki
  • Publication number: 20040039853
    Abstract: An output port determining apparatus is capable of determining a longest match for a network address without the necessity of processing operations in memory devices. Output ports are connected to networks. An address bus has signal lines corresponding to bits of a node address which uniquely identifies a node as a connection destination. A plurality of memory devices are connected to as many the signal lines as the number of bits of network addresses of the networks, and store port information representing the output ports to output data therefrom at memory addresses corresponding to the network addresses. An address register outputs a received node address to the address bus. A selecting circuit selects the port information stored in one of the memory devices which is connected to the most signal lines, from the port information outputted from the memory devices according to the node address, and outputs the selected port information.
    Type: Application
    Filed: April 2, 2003
    Publication date: February 26, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Tomokazu Aoki
  • Publication number: 20040025040
    Abstract: A memory device which prevents lowering of processing efficiency of the entire system during processing for encryption or decryption of data. The first memory circuit stores data which is inputted through an external-bus-connection terminal. The second memory circuit is internally connected to the first memory circuit, acquires a duplicate of the data stored in the first memory circuit, and stores the duplicate of the data. The encryption/decryption circuit is internally connected to the second memory circuit, performs processing for encryption or decryption of the duplicate of the data stored in the second memory circuit, in response to an input of designation of an operation, and returns a result of the processing to the second memory circuit.
    Type: Application
    Filed: February 28, 2003
    Publication date: February 5, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu Aoki, Yoshihiro Emori
  • Publication number: 20020176426
    Abstract: There are provided a packet transfer device, a semiconductor device, and a packet transfer system, which can provide a DMZ constructed in a simple configuration. A LAN is connected to a first port. A public server is connected to a second port. A WAN is connected to a third port. A filtering section performs filtering processing according to attributes of each packet inputted via any one of the first to third ports. A routing section carries out routing processing on the packet which was not discarded by the filtering section.
    Type: Application
    Filed: September 26, 2001
    Publication date: November 28, 2002
    Inventors: Kazuya Asano, Teruhiko Nagatomo, Tomokazu Aoki, Junichi Hashida