Patents by Inventor Tomokazu Hamada

Tomokazu Hamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11394095
    Abstract: To obtain a downsized dielectric filter suitable for a laminating structure, a dielectric filter is configured with use of a dielectric waveguide formed of a conductor pattern and vias in a laminating direction within a multilayer dielectric substrate, two strip lines formed in a planar direction of the multilayer dielectric substrate, and two strip line-waveguide converters each configured to perform transmission line conversion between the dielectric waveguide and each strip line. In this manner, it is possible to provide a dielectric filter for which an area to be occupied in the planar direction of the multilayer dielectric substrate is suppressed.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: July 19, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Akimichi Hirota, Takeshi Yuasa, Tomokazu Hamada, Yasuo Morimoto
  • Patent number: 10971792
    Abstract: Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: April 6, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Yasuo Morimoto, Naofumi Yoneda, Akimichi Hirota, Tomokazu Hamada, Tsuyoshi Hatate
  • Publication number: 20210083353
    Abstract: To obtain a downsized dielectric filter suitable for a laminating structure, a dielectric filter is configured with use of a dielectric waveguide formed of a conductor pattern and vias in a laminating direction within a multilayer dielectric substrate, two strip lines formed in a planar direction of the multilayer dielectric substrate, and two strip line-waveguide converters each configured to perform transmission line conversion between the dielectric waveguide and each strip line. In this manner, it is possible to provide a dielectric filter for which an area to be occupied in the planar direction of the multilayer dielectric substrate is suppressed.
    Type: Application
    Filed: June 7, 2018
    Publication date: March 18, 2021
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu YOSHIOKA, Akimichi HIROTA, Takeshi YUASA, Tomokazu HAMADA, Yasuo MORIMOTO
  • Publication number: 20200028228
    Abstract: Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.
    Type: Application
    Filed: April 12, 2017
    Publication date: January 23, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu YOSHIOKA, Yasuo MORIMOTO, Naofumi YONEDA, Akimichi HIROTA, Tomokazu HAMADA, Tsuyoshi HATATE
  • Patent number: 8149060
    Abstract: Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: April 3, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhisa Yamauchi, Hifumi Noto, Akira Inoue, Tomokazu Hamada, Masatoshi Nakayama, Kenichi Horiguchi
  • Patent number: 8072288
    Abstract: A directional coupler capable of improving a directionality of a directional coupler body including four terminals. The directional coupler includes a directional coupler body including the four terminals of an input port, an output port, a coupling port, and an isolation port; and a combiner for combining powers of an output signal of the coupling port and an output signal of the isolation port of the directional coupler body; and a directionality improving circuit for amplifying or attenuating at least one of the output signal of the coupling port and the output signal of the isolation port before outputting the same, and the combiner combines powers of the output signals amplified or attenuated by the directionality improving circuit.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: December 6, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhisa Yamauchi, Masatoshi Nakayama, Yasuhiro Onaka, Tomokazu Hamada, Satoru Ishizaka
  • Publication number: 20110012681
    Abstract: Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element.
    Type: Application
    Filed: March 25, 2008
    Publication date: January 20, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuhisa Yamauchi, Hifumi Noto, Akira Inoue, Tomokazu Hamada, Masatoshi Nakayama, Kenichi Horiguchi
  • Publication number: 20100097160
    Abstract: A directional coupler capable of improving a directionality of a directional coupler body including four terminals. The directional coupler includes a directional coupler body including the four terminals of an input port, an output port, a coupling port, and an isolation port; and a combiner for combining powers of an output signal of the coupling port and an output signal of the isolation port of the directional coupler body; and a directionality improving circuit for amplifying or attenuating at least one of the output signal of the coupling port and the output signal of the isolation port before outputting the same, and the combiner combines powers of the output signals amplified or attenuated by the directionality improving circuit.
    Type: Application
    Filed: April 11, 2008
    Publication date: April 22, 2010
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazuhisa Yamauchi, Masatoshi Nakayama, Yasuhiro Onaka, Tomokazu Hamada, Satoru Ishizaka
  • Patent number: 7557654
    Abstract: A linearizer changes a gain characteristic to a valley characteristic in which a gain reduces and then increases. The linearizer includes: a signal path in which an RF signal input terminal an input side bias blocking capacitor, a diode pair, including diodes having opposite polarities to each other, an output side bias blocking capacitor and an RF signal output terminal in series in the stated order; a bias circuit in which a resistor is provided between and a signal path formed between the input side bias blocking capacitor and the diode pair and a bias terminal; an RF short-circuiting capacitor whose one end is connected with the bias circuit between the bias terminal and the resistor and whose other end is grounded; and a DC feed inductor whose one end is connected with the signal path between the diode pair and the output side bias blocking capacitor and whose other end is grounded.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: July 7, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hifumi Noto, Kazuhisa Yamauchi, Yoshihiro Hamamatsu, Tomokazu Hamada, Masatoshi Nakayama
  • Publication number: 20070241815
    Abstract: A linearizer changes a gain characteristic to a valley characteristic in which a gain reduces and then increases. The linearizer includes: a signal path in which an RF signal input terminal (1), an input side bias blocking capacitor (4), a diode pair (8, 12) including diodes having opposite polarities to each other, an output side bias blocking capacitor (5), and an RF signal output terminal (2) in series in the stated order; a bias circuit in which a resistor is provided between and a signal path formed between the input side bias blocking capacitor (4) and the diode pair (8, 12) and a bias terminal (3); an RF short-circuiting capacitor (6) whose one end is connected with the bias circuit between the bias terminal (3) and the resistor (7) and whose other end is grounded; and a DC feed inductor (11) whose one end is connected with the signal path between the diode pair (8, 12) and the output side bias blocking capacitor (5) and whose other end is grounded.
    Type: Application
    Filed: October 28, 2004
    Publication date: October 18, 2007
    Inventors: Hifumi Noto, Kazuhide Yamauchi, Yoshihiro Hamamatsu, Tomokazu Hamada, Masatoshi Nakayama
  • Patent number: 6930993
    Abstract: In a TDMA communication system in which a base station communicates with a plurality of subscriber stations, communication time slots used in a wireless communication are allocated/arranged while avoiding an occurrence of interference. In the case that interference (51) occurs in a communication time slot (411) of a line (71) through which the communication is made from a subscriber station (21) to a base station (1), interference information is registered into an interference time slot database (101) of the base station (1). When the communication time slots are reallocated and rearranged, a TDMA control unit of the base station (1) executes the communication time slot reallocation/rearrangement by referring to information registered in the interference time slot database (101), so that the occurrence of interference is avoided.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: August 16, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomokazu Hamada, Youichi Moritani, Takashi Kawabata, Shuji Ito
  • Patent number: 6873607
    Abstract: In a radio communication system in which multiple access is carried out between a base station and a plurality of subscriber stations by a TDMA communication method, occurrence of the interference in the R channels through which the subscriber stations (21 to 24) issue a call request to the base station (1) can be detected precisely, and time slot arrangement of the R channels is changed by detecting the interference to thus avoid the interference.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: March 29, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomokazu Hamada, Youichi Moritani, Takashi Kawabata, Shuji Ito
  • Patent number: 6424645
    Abstract: A TDMA radio communication method including the steps of: providing a latter part of each of super frames with an assignment information notification period which is preceded by an assignment processing period, and providing a remaining part of the each of the super frame with an assignment request collecting period; transmitting, from a terminal station to a base station, assignment request information using a plurality of frames included in the assignment request collecting period; transmitting, from the base station to the terminal station, frame structure information and assignment information over a plurality of frames included in the assignment information notification period; and carrying out, in the base station, channel assignment of a radio channel, changes of the frame structure and of the channel assignment in response to timings of the super frames.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: July 23, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takashi Kawabata, Youichi Moritani, Tomokazu Hamada, Tohru Sogabe