Patents by Inventor Tomokazu Katano
Tomokazu Katano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11939695Abstract: A quartz glass crucible 1 having a cylindrical side wall portion 10a, a bottom portion 10b, and a corner portion 10c includes a transparent layer 11 as an innermost layer made of quartz glass, a semi-molten layer 13 as an outermost layer made of raw material silica powder solidified in a semi-molten state, and a bubble layer 12 made of quartz glass interposed therebetween. An infrared transmissivity of the corner portion 10c in a state where the semi-molten layer 13 is removed is 25 to 51%, the infrared transmissivity of the corner portion 10c in the state where the semi-molten layer 13 is removed is lower than an infrared transmissivity of the side wall portion 10a, and the infrared transmissivity of the side wall portion 10a in the state where the semi-molten layer 13 is removed is lower than an infrared transmissivity of the bottom portion 10b.Type: GrantFiled: December 16, 2019Date of Patent: March 26, 2024Assignee: SUMCO CORPORATIONInventors: Ken Kitahara, Masanori Fukui, Hiroshi Kishi, Tomokazu Katano, Eriko Kitahara
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Publication number: 20220090290Abstract: A quartz glass crucible 1 having a cylindrical side wall portion 10a, a bottom portion 10b, and a corner portion 10c connecting the side wall portion 10a and the bottom portion 10b to each other includes a transparent layer 11 made of quartz glass, and a bubble layer 12 made of quartz glass and formed outside the transparent layer 11. A ratio of an infrared transmittance of the corner portion 10c at a maximum thickness position of the corner portion 10c to an infrared transmittance of the side wall portion 10a is 0.3 or more and 0.99 or less, and an absolute value of a rate of change in infrared transmittance in a height direction along a wall surface of the crucible from a center of the bottom portion 10b toward an upper end of the side wall portion 10a is 3%/cm or less.Type: ApplicationFiled: December 16, 2019Publication date: March 24, 2022Inventors: Takeshi FUJITA, Ken KITAHARA, Tomokazu KATANO, Eriko KITAHARA
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Publication number: 20220090291Abstract: A quartz glass crucible 1 having a cylindrical side wall portion 10a, a bottom portion 10b, and a corner portion 10c includes a transparent layer 11 as an innermost layer made of quartz glass, a semi-molten layer 13 as an outermost layer made of raw material silica powder solidified in a semi-molten state, and a bubble layer 12 made of quartz glass interposed therebetween. An infrared transmissivity of the corner portion 10c in a state where the semi-molten layer 13 is removed is 25 to 51%, the infrared transmissivity of the corner portion 10c in the state where the semi-molten layer 13 is removed is lower than an infrared transmissivity of the side wall portion 10a, and the infrared transmissivity of the side wall portion 10a in the state where the semi-molten layer 13 is removed is lower than an infrared transmissivity of the bottom portion 10b.Type: ApplicationFiled: December 16, 2019Publication date: March 24, 2022Inventors: Ken KITAHARA, Masanori FUKUI, Hiroshi KISHI, Tomokazu KATANO, Eriko KITAHARA
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Patent number: 10494734Abstract: A method for producing a plurality of silicon single crystals using a single quartz crucible by repeating a step of heating a silicon material charged in the quartz crucible within a chamber and a step of pulling a silicon single crystal from the silicon melt in the quartz crucible includes a first melting step of melting the silicon material fed to the quartz crucible used to pull a first silicon single crystal, and a second melting step of melting an additional amount of the silicon material fed to the quartz crucible used to pull the second and subsequent silicon single crystals. The interior of the chamber is set to be a first furnace pressure during the first melting step and then set to be a second furnace pressure higher than the first furnace pressure during the second melting step.Type: GrantFiled: July 6, 2016Date of Patent: December 3, 2019Assignee: SUMCO CORPORATIONInventors: Kaoru Kajiwara, Yasuhiro Saito, Takahiro Kanehara, Tomokazu Katano, Kazumi Tanabe, Hideki Tanaka
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Patent number: 10211066Abstract: A silicon single crystal is pulled up such that nitrogen concentration of the crystal is 1×1011 to 2×1013 atoms/cm3, the crystal cooling rate is about 4.2° C./min at a temperature of a silicon melting point to 1350° C. and is about 3.1° C./min at a temperature of 1200° C. to 1000° C., and oxygen concentration of a wafer is 9.5×1017 to 13.5×1017 atoms/cm3. After a heat treatment is performed on the wafer sliced from the silicon single crystal in a treatment condition of 875° C. for about 30 min, growth of an epitaxial layer is caused. Thus, an epitaxial wafer in which the number of epitaxial defects is not increased while maintaining predetermined oxygen concentration and slips do not occur is produced.Type: GrantFiled: April 21, 2016Date of Patent: February 19, 2019Assignee: SUMCO CORPORATIONInventor: Tomokazu Katano
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Publication number: 20180197751Abstract: An epitaxial silicon wafer includes a silicon wafer consisting of a COP region in which a nitrogen concentration is 1×108?3×109 atoms/cm3, and an epitaxial silicon film formed on the silicon wafer. When heat treatment for evaluation is applied, a density of BMD formed inside the silicon wafer is 1×108?3×109 atoms/cm3 over the entire radial direction of the silicon wafer. An average density of the BMD formed in an outer peripheral region of the silicon wafer which is a 1-10 mm range separated inward from an outermost periphery thereof is lower than the average density of the BMD formed in a center region. A variation in the BMD density in the outer peripheral region is 3 or less, and a residual oxygen concentration in the outer peripheral region is 8×1017 atoms/cm3 or more.Type: ApplicationFiled: January 6, 2017Publication date: July 12, 2018Applicant: SUMCO CORPORATIONInventors: Yasuo KOIKE, Tomokazu KATANO, Toshiaki ONO
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Patent number: 10020203Abstract: An epitaxial silicon wafer includes a silicon wafer consisting of a COP region in which a nitrogen concentration is 1×1012?1×1013 atoms/cm3, and an epitaxial silicon film formed on the silicon wafer. When heat treatment for evaluation is applied, a density of BMD formed inside the silicon wafer is 1×108?3×109 atoms/cm3 over the entire radial direction of the silicon wafer. An average density of the BMD formed in an outer peripheral region of the silicon wafer which is a 1-10 mm range separated inward from an outermost periphery thereof is lower than the average density of the BMD formed in a center region. A variation in the BMD density in the outer peripheral region is 3 or less, and a residual oxygen concentration in the outer peripheral region is 8×1017 atoms/cm3 or more.Type: GrantFiled: January 6, 2017Date of Patent: July 10, 2018Assignee: SUMCO CORPORATIONInventors: Yasuo Koike, Tomokazu Katano, Toshiaki Ono
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Publication number: 20180187330Abstract: A method for producing a plurality of silicon single crystals using a single quartz crucible by repeating a step of heating a silicon material charged in the quartz crucible within a chamber and a step of pulling a silicon single crystal from the silicon melt in the quartz crucible includes a first melting step of melting the silicon material fed to the quartz crucible used to pull a first silicon single crystal, and a second melting step of melting an additional amount of the silicon material fed to the quartz crucible used to pull the second and subsequent silicon single crystals. The interior of the chamber is set to be a first furnace pressure during the first melting step and then set to be a second furnace pressure higher than the first furnace pressure during the second melting step.Type: ApplicationFiled: July 6, 2016Publication date: July 5, 2018Applicant: SUMCO CORPORATIONInventors: Kaoru KAJIWARA, Yasuhiro SAITO, Takahiro KANEHARA, Tomokazu KATANO, Kazumi TANABE, Hideki TANAKA
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Publication number: 20180108538Abstract: A silicon single crystal is pulled up such that nitrogen concentration of the crystal is 1×1011 to 2×1013 atoms/cm3, the crystal cooling rate is about 4.2° C./min at a temperature of a silicon melting point to 1350° C. and is about 3.1° C./min at a temperature of 1200° C. to 1000° C., and oxygen concentration of a wafer is 9.5×1017 to 13.5×1017 atoms/cm3. After a heat treatment is performed on the wafer sliced from the silicon single crystal in a treatment condition of 875° C. for about 30 min, growth of an epitaxial layer is caused. Thus, an epitaxial wafer in which the number of epitaxial defects is not increased while maintaining predetermined oxygen concentration and slips do not occur is produced.Type: ApplicationFiled: April 21, 2016Publication date: April 19, 2018Applicant: SUMCO CORPORATIONInventor: Tomokazu KATANO
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Patent number: 8920560Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.Type: GrantFiled: November 2, 2007Date of Patent: December 30, 2014Assignee: Sumco CorporationInventors: Yasuo Koike, Toshiaki Ono, Naoki Ikeda, Tomokazu Katano
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Publication number: 20080286565Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.Type: ApplicationFiled: November 2, 2007Publication date: November 20, 2008Inventors: Yasuo Koike, Toshiaki Ono, Naoki Ikeda, Tomokazu Katano