Patents by Inventor Tomokazu Nakashima

Tomokazu Nakashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240189625
    Abstract: To implement downsizing of an apparatus and highly accurate beam irradiation. An irradiation nozzle 4 that irradiates a target object Pt with a radiotherapy beam includes: a nozzle base part 42 fixed on a beam axis 40 through which the radiotherapy beam passes; and a nozzle tip part that irradiates the target object with the radiotherapy beam that has passed through the nozzle base part, in which the nozzle tip part is fixed at a first position when the target object is irradiated with the radiotherapy beam and is fixed at a second position when the target object is imaged, and a curved movement path in which the nozzle tip part is movable between the first position and the second position is provided.
    Type: Application
    Filed: February 15, 2022
    Publication date: June 13, 2024
    Inventors: Taizo HONDA, Chihiro NAKASHIMA, Tomokazu SHIMAKURA
  • Patent number: 11993271
    Abstract: An information processing apparatus communicable with a vehicle includes a controller. The controller is configured to store behavior information of a user in the vehicle in association with a date and time, acquire an image via an imaging unit of the vehicle when a difference between behavior information at a specific time and behavior information at a time later than the specific time is detected, an store the image in association with the date and time and the behavior information.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: May 28, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Toyokazu Nakashima, Ryuichi Kamaga, Mitsuhiro Miura, Yasuhiro Baba, Tomokazu Maya, Ryosuke Kobayashi, Genshi Kuno
  • Patent number: 11917382
    Abstract: An in-vehicle acoustic system includes a first amplifier that outputs a first audio signal to a first mid-range speaker; a second amplifier that outputs a second audio signal to a second mid-range speaker; a third amplifier that outputs a third audio signal to a first high-range speaker and a first low-range speaker; and a fourth amplifier that outputs a fourth audio signal to a second high-range speaker and a second low-range speaker, in which the third audio signal is inputted to the first high-range speaker, the fourth audio signal is inputted to the second high-range speaker, the first audio signal is inputted to a deep-bass speaker, the third audio signal is inputted to the first low-range speaker, the fourth audio signal is inputted to the second low-range speaker.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: February 27, 2024
    Assignee: YAMAHA Corporation
    Inventors: Katsuya Hirano, Tomokazu Hikida, Takakazu Nakashima
  • Publication number: 20200090120
    Abstract: An apparatus refers to information indicating relationships between conditions when a part is transported, transportation times of the part, and characteristic changes of the part, and makes a determination of whether or not a characteristic change of the part corresponding to a transportation time required when a first transportation route is passed through exceeds a threshold value based on conditions when the first transportation route is used for transporting the part. When it has been determined that the threshold value is not exceeded, the apparatus outputs information for identifying the first transportation route, and when it has been determined that the threshold value is exceeded, the apparatus makes the determination with respect to a second transportation route different from the first transportation route.
    Type: Application
    Filed: August 14, 2019
    Publication date: March 19, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, MICHIKO NARITA, Masayuki ITOH
  • Patent number: 10395832
    Abstract: A method of manufacturing an electronic component includes forming a component body into which elements are built; and a metal plate electrode that is joined to the component body by conductive paste so as to be electrically coupled to the elements, the metal plate electrode exceeding in size a surface of the component body onto which the conductive paste is deposited.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: August 27, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Tomokazu Nakashima, Masayuki Itoh, Yoshinori Mesaki
  • Publication number: 20190180939
    Abstract: A method of manufacturing an electronic component includes forming a component body into which elements are built; and a metal plate electrode that is joined to the component body by conductive paste so as to be electrically coupled to the elements, the metal plate electrode exceeding in size a surface of the component body onto which the conductive paste is deposited.
    Type: Application
    Filed: February 15, 2019
    Publication date: June 13, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, Masayuki ITOH, YOSHINORI MESAKI
  • Patent number: 10283270
    Abstract: An electronic component includes: a component body into which elements are built; and a metal plate electrode that is joined to the component body by conductive paste so as to be electrically coupled to the elements, wherein the metal plate electrode exceeds in size a surface of the component body onto which the conductive paste is deposited.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: May 7, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Tomokazu Nakashima, Masayuki Itoh, Yoshinori Mesaki
  • Publication number: 20180240605
    Abstract: An electronic component includes a main body mounted over a board, a case that houses the main body, a base member that is arranged between the case and the board, a lead that extends out from the main body and penetrates through the base member to be joined onto the board, and a leg that extends out from the case and penetrates through the base member to be joined to the board.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 23, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, Masayuki ITOH, Yoshinori MESAKI
  • Patent number: 9865396
    Abstract: A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the fir
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: January 9, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Tomokazu Nakashima, Masayuki Itoh
  • Publication number: 20170019999
    Abstract: An electronic component includes: a component body into which elements are built; and a metal plate electrode that is joined to the component body by conductive paste so as to be electrically coupled to the elements, wherein the metal plate electrode exceeds in size a surface of the component body onto which the conductive paste is deposited.
    Type: Application
    Filed: June 14, 2016
    Publication date: January 19, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, Masayuki ITOH, YOSHINORI MESAKI
  • Patent number: 9384900
    Abstract: An electronic component includes a metal case with an opening at one end, a metal foil placed in an internal space of the metal case, a packing made of an elastic material and fit into the opening of the metal case, the packing having a through-bore, a cap made of a foamed material and provided at an outer side of the packing, a conductive tab inserted in the through-bore of the packing and connected at one end to the metal foil in the internal space of the metal case, and a lead with a first end connected to another end of the conductive tab and a second end projecting externally from the metal case.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: July 5, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Tomokazu Nakashima, Masayuki Itoh
  • Publication number: 20160155089
    Abstract: A computer-readable recording medium stores therein a program that causes a computer to execute a process. The process includes receiving a condition for using a component; referring to a stored content of a first storage unit that stores a characteristic value of the component for each condition for using the component, thereby acquiring a characteristic value that is related to the received condition; referring to a stored content of a second storage unit that stores a price of the component, thereby acquiring the price that is related to the component; normalizing the acquired price by using the acquired characteristic value; and outputting the normalized price.
    Type: Application
    Filed: February 3, 2016
    Publication date: June 2, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, Masayuki ITOH, Kiyokazu MORIIZUMI
  • Publication number: 20160055977
    Abstract: A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the fir
    Type: Application
    Filed: November 4, 2015
    Publication date: February 25, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, Masayuki ITOH
  • Patent number: 9208951
    Abstract: A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the fir
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: December 8, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Tomokazu Nakashima, Masayuki Itoh
  • Publication number: 20150213958
    Abstract: A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the fir
    Type: Application
    Filed: November 25, 2014
    Publication date: July 30, 2015
    Applicant: Fujitsu Limited
    Inventors: Tomokazu Nakashima, Masayuki Itoh
  • Publication number: 20140168860
    Abstract: An electronic component includes a metal case with an opening at one end, a metal foil placed in an internal space of the metal case, a packing made of an elastic material and fit into the opening of the metal case, the packing having a through-bore, a cap made of a foamed material and provided at an outer side of the packing, a conductive tab inserted in the through-bore of the packing and connected at one end to the metal foil in the internal space of the metal case, and a lead with a first end connected to another end of the conductive tab and a second end projecting externally from the metal case.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Tomokazu NAKASHIMA, Masayuki ITOH
  • Patent number: 8446708
    Abstract: A solid electrolytic capacitor includes a capacitor element having two opposite cathode surfaces, a cathode terminal metal plate having a first cathode connecting portion electrically connected to one of the two opposite cathode surfaces, and an auxiliary cathode metal plate having a second cathode connecting portion electrically connected to the other one of the two opposite cathode surfaces of the capacitor element. The cathode terminal metal plate includes a groove electrically connected to the first cathode connecting portion. The auxiliary cathode metal plate includes an end portion that is electrically connected to the second cathode connecting portion and engages with the groove. The cathode terminal metal plate further includes an outer terminal portion.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 21, 2013
    Assignee: Fujitsu Limited
    Inventors: Tomokazu Nakashima, Masayuki Itoh
  • Patent number: 8440481
    Abstract: Manufacturing method of an electronic component including connecting one lead of a pair of leads to a surface parallel with a pn connection layer of an electronic element having a structure where the p-type layer and the n-type layer are connected by the pn connection layer provided between the p-type layer and the n-type layer, connecting another lead to another surface parallel with the pn connection layer; and forming a supporting part of the pair of the leads that is connected to and supporting the electronic element, and an electrode part functioning as an electrode, by bending the pair of the leads to an outside.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: May 14, 2013
    Assignee: Fujitsu Limited
    Inventors: Masayuki Itoh, Takao Ishikawa, Tomokazu Nakashima
  • Patent number: 8196278
    Abstract: A method for taking an electronic component out of a carrier tape configured to house the electronic component in a concave that is defined by a sidewall and a bottom surface reduces a binding force applied by the concave to the electronic component by stretching the sidewall to outside near a perforation hole that is formed at least one of the sidewall and a portion of the bottom surface adjacent to the sidewall.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: June 12, 2012
    Assignee: Fujitsu Limited
    Inventors: Tomokazu Nakashima, Masako Okazaki, Masayuki Itoh
  • Publication number: 20120088335
    Abstract: Manufacturing method of an electronic component including connecting one lead of a pair of leads to a surface parallel with a pn connection layer of an electronic element having a structure where the p-type layer and the n-type layer are connected by the pn connection layer provided between the p-type layer and the n-type layer, connecting another lead to another surface parallel with the pn connection layer; and forming a supporting part of the pair of the leads that is connected to and supporting the electronic element, and an electrode part functioning as an electrode, by bending the pair of the leads to an outside.
    Type: Application
    Filed: December 7, 2011
    Publication date: April 12, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Masayuki ITOH, Takao ISHIKAWA, Tomokazu NAKASHIMA