Patents by Inventor Tomokazu SAITO

Tomokazu SAITO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971296
    Abstract: A measurement method of receiving an emission light output from an optical semiconductor element on an incident end surface of an optical probe, shifts a relative position between the optical semiconductor element and the optical probe on a plane surface intersecting with an optical axis of the emission light, measures an incident intensity of the emission light at several positions, and obtains an incident intensity pattern showing a relationship between a change in the relative position and the respective incident intensities.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: April 30, 2024
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Michitaka Okuta, Yuki Saito, Hisao Narita, Shou Harako, Jukiya Fukushi, Tomokazu Saito, Toshinaga Takeya
  • Publication number: 20230249698
    Abstract: There is provided a control apparatus having two or more control units that are connected with one another through a communication path; each of the control units has a switching processing section that selects the control unit that is made to continue the operation of software for the control unit in which an abnormality has been detected, based on an operational requirement for software in which an abnormality has been detected and the security state and control state of the control unit other than the control unit in which the abnormality has been detected.
    Type: Application
    Filed: November 19, 2020
    Publication date: August 10, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomokazu SAITO, Koji SHIMAMURA
  • Publication number: 20220034714
    Abstract: A measurement method of receiving an emission light output from an optical semiconductor element on an incident end surface of an optical probe, shifts a relative position between the optical semiconductor element and the optical probe on a plane surface intersecting with an optical axis of the emission light, measures an incident intensity of the emission light at several positions, and obtains an incident intensity pattern showing a relationship between a change in the relative position and the respective incident intensities.
    Type: Application
    Filed: August 2, 2021
    Publication date: February 3, 2022
    Inventors: Michitaka OKUTA, Yuki SAITO, Hisao NARITA, Shou HARAKO, Jukiya FUKUSHI, Tomokazu SAITO, Toshinaga TAKEYA
  • Publication number: 20210399350
    Abstract: A technique for improving the performance of a secondary battery is provided. A secondary battery according to an embodiment includes a first electrode, a second electrode, a first layer disposed on the first electrode, and including a first n-type oxide semiconductor, a second layer disposed on the first layer and including a second n-type oxide semiconductor material and a first insulating material, a third layer disposed on the second layer and including tantalum oxide, and a fourth layer disposed on the third layer and including a second insulating material.
    Type: Application
    Filed: November 7, 2019
    Publication date: December 23, 2021
    Inventors: Tomokazu SAITO, Takuo KUDOH
  • Publication number: 20210351412
    Abstract: A secondary battery includes: a solid electrolyte layer which contains a tantalum oxide as a solid electrolyte; a positive-electrode active material layer which is disposed on an upper surface of the solid electrolyte layer and contains a nickel hydroxide (Ni(OH)2) as a positive-electrode active material; and a negative-electrode active material layer disposed on a lower surface of the solid electrolyte layer so as to be opposite to the positive-electrode active material layer and containing a titanium oxide (TiOx) or a titanium oxide (TiOx) and a silicon oxide (SiOx) as a negative-electrode active material. There is provided a secondary battery capable of improving electricity storage performance by improving a self-discharge.
    Type: Application
    Filed: July 23, 2021
    Publication date: November 11, 2021
    Inventors: Daisuke HASEGAWA, Kazuyuki TSUNOKUNI, Tomokazu SAITO, Taku HIGUTI
  • Patent number: 10991933
    Abstract: A secondary battery according to the present invention includes a first electrode, a second electrode, a charging layer arranged between the first electrode (11) and the second electrode and containing a mixture of an insulating material and a first n-type oxide semiconductor material, an n-type oxide semiconductor layer arranged between the charging layer and the first electrode and containing a second n-type oxide semiconductor material, a p-type oxide semiconductor layer (16) arranged between the charging layer and the second electrode and containing a p-type oxide semiconductor material, a mixture layer arranged between the charging layer and the p-type oxide semiconductor layer and containing a mixture of silicon oxide and a third n-type oxide semiconductor material, and a conductive layer arranged between the first electrode and the n-type oxide semiconductor layer and containing a metal material.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: April 27, 2021
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Takuo Kudoh, Harutada Dewa, Hikaru Takano, Tomokazu Saito, Takashi Tonokawa
  • Publication number: 20210091400
    Abstract: To provide a manufacturing method of a secondary battery capable of increasing discharge capacity.
    Type: Application
    Filed: December 4, 2020
    Publication date: March 25, 2021
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Kazuyuki TSUNOKUNI, Tomokazu SAITO, Yuki SATO, Hikaru TAKANO
  • Patent number: 10705151
    Abstract: An intermediate structure unit for a secondary cell according to the present invention is the intermediate structure unit for a secondary cell having a secondary cell and a test structure unit on a common substrate. Each of the secondary cell and the test structure unit includes a first electrode layer and a second electrode layer. A plurality of layers are layered at the secondary cell between the first electrode layer and the second electrode layer. The plurality of layers include at least a metal oxide semiconductor layer and a charging layer. A party of the plurality of layers is formed at the test structure unit between the first electrode layer and the second electrode layer.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: July 7, 2020
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Yuki Sato, Kazuyuki Tsunokuni, Tomokazu Saito
  • Publication number: 20200185701
    Abstract: A secondary battery according to the present invention includes a first electrode, a second electrode, a charging layer arranged between the first electrode (11) and the second electrode and containing a mixture of an insulating material and a first n-type oxide semiconductor material, an n-type oxide semiconductor layer arranged between the charging layer and the first electrode and containing a second n-type oxide semiconductor material, a p-type oxide semiconductor layer (16) arranged between the charging layer and the second electrode and containing a p-type oxide semiconductor material, a mixture layer arranged between the charging layer and the p-type oxide semiconductor layer and containing a mixture of silicon oxide and a third n-type oxide semiconductor material, and a conductive layer arranged between the first electrode and the n-type oxide semiconductor layer and containing a metal material.
    Type: Application
    Filed: July 21, 2017
    Publication date: June 11, 2020
    Inventors: Takuo KUDOH, Harutada DEWA, Hikaru TAKANO, Tomokazu SAITO, Takashi TONOKAWA
  • Publication number: 20200006764
    Abstract: A secondary battery includes: a first conductivity-type first oxide semiconductor; a first charge layer disposed on the first oxide semiconductor layer, the first charge layer composed by including a first metal oxide; a first separation layer disposed on the first charge layer; and a second conductivity-type second oxide semiconductor layer disposed on the first separation layer. The first charge layer is not composed of a material containing silicon. A second separation layer disposed on the first charge layer between the first separation layer and the first charge layer may be included. Provided is a secondary battery capable of reducing an internal resistance and capable of increasing an electricity storage capacity per unit volume (weight).
    Type: Application
    Filed: September 12, 2019
    Publication date: January 2, 2020
    Inventors: Tomokazu SAITO, Hikaru TAKANO, Yuki SATO, Kazuyuki TSUNOKUNI
  • Publication number: 20190273278
    Abstract: A method of manufacturing a secondary battery includes a first electrode, an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor, an n-type metal oxide semiconductor and an insulator, an intermediate insulating layer containing an insulator as a main component, a p-type metal oxide semiconductor layer made of a p-type metal oxide semiconductor, and a second electrode are laminated in this order, a first process of applying a positive voltage between the first electrode and the second electrode with reference to the first electrode and a second process of applying a positive voltage between the first electrode and the second electrode, and a second process in which 0 V is applied between the first process cycle and the second process cycle in this order is defined as a first unit cycle and a predetermined number of first unit cycles are repeated.
    Type: Application
    Filed: April 4, 2017
    Publication date: September 5, 2019
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Kazuyuki TSUNOKUNI, Tomokazu SAITO, Yuki SATO, Hikaru TAKANO
  • Patent number: 10367082
    Abstract: The present invention provides a method for manufacturing a secondary cell having a plurality of unit cells 21 that are connected in parallel, including, a step to prepare sheet-shaped unit cells each having a structure that a first electrode layer, a metal oxide semiconductor layer, a charging layer, and a second electrode layer are layered, a step to form a cell sheet by connecting the laminated unit cells in parallel, a step to measure a capacity of the cell sheet, and a step to connect a unit cell for capacity adjustment to the cell sheet in parallel when the capacity is smaller than a specification value.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: July 30, 2019
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Tomokazu Saito, Yuki Sato
  • Patent number: 10367140
    Abstract: A method for manufacturing a secondary cell, the secondary cell including a charging layer that captures electrons by forming energy levels in a band gap by causing a photoexcited structural change in an n-type metal oxide semiconductor coated with an insulating material, includes a coating step to coat a coating liquid so as to form a coating film that includes constituents that will form the charging layer; a drying step to dry the coating liquid coated in the coating step; a UV irradiating step to form a UV-irradiated coating film by irradiating the dried coating film obtained through the drying step with ultraviolet light; and a burning step to burn a plurality of the UV-irradiated coating films, after forming the plurality of UV-irradiated coating films by repeating a set plural times, the set including the coating step, the drying step, and the UV irradiating step.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: July 30, 2019
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Tomokazu Saito, Harutada Dewa
  • Publication number: 20190036150
    Abstract: A sheet jig of the present invention includes a center placement face on which a center region of a sheet is placed as having a plurality of first air holes to cause the center region of the sheet to be stuck, a peripheral upper face formed outside the center placement face at height being lower than the center placement face as having a plurality of second air holes to cause a peripheral region of the sheet to be stuck, and a slope face formed from the center placement face to the peripheral upper face.
    Type: Application
    Filed: March 23, 2017
    Publication date: January 31, 2019
    Inventors: Katsuhiko KIMURA, Yoshiaki MIZOE, Tomokazu SAITO, Harutada DEWA
  • Publication number: 20180342603
    Abstract: The present invention provides a method for manufacturing a secondary cell having a plurality of unit cells 21 that are connected in parallel, including, a step to prepare sheet-shaped unit cells each having a structure that a first electrode layer, a metal oxide semiconductor layer, a charging layer, and a second electrode layer are layered, a step to form a cell sheet by connecting the laminated unit cells in parallel, a step to measure a capacity of the cell sheet, and a step to connect a unit cell for capacity adjustment to the cell sheet in parallel when the capacity is smaller than a specification value.
    Type: Application
    Filed: August 3, 2016
    Publication date: November 29, 2018
    Inventors: Tomokazu SAITO, Yuki SATO
  • Publication number: 20180210033
    Abstract: An intermediate structure unit for a secondary cell according to the present invention is the intermediate structure unit for a secondary cell having a secondary cell and a test structure unit on a common substrate. Each of the secondary cell and the test structure unit includes a first electrode layer and a second electrode layer. A plurality of layers are layered at the secondary cell between the first electrode layer and the second electrode layer. The plurality of layers include at least a metal oxide semiconductor layer and a charging layer. A party of the plurality of layers is formed at the test structure unit between the first electrode layer and the second electrode layer.
    Type: Application
    Filed: June 23, 2016
    Publication date: July 26, 2018
    Inventors: Yuki SATO, Kazuyuki TSUNOKUNI, Tomokazu SAITO
  • Publication number: 20180182959
    Abstract: A method for manufacturing a secondary cell, the secondary cell including a charging layer that captures electrons by forming energy levels in a band gap by causing a photoexcited structural change in an n-type metal oxide semiconductor coated with an insulating material, includes: a coating step to coat a liquid so as to form a coating film that includes constituents that will form the charging layer; a drying step to dry the coating liquid coated in the coating step; a UV irradiating step to form a UV-irradiated coating film by irradiating the dried coating film obtained through the drying step with ultraviolet light; and a burning step to burn a plurality of the UV-irradiated coating films, after forming the plurality of UV-irradiated coating films by repeating a set plural times, the set including the coating step, the drying step, and the UV irradiating step.
    Type: Application
    Filed: May 17, 2016
    Publication date: June 28, 2018
    Inventors: Tomokazu SAITO, Harutada DEWA
  • Patent number: 9972862
    Abstract: Provided is a secondary battery in which a single-layer secondary cell has an all-solid-state secondary cell structure with a storage layer sandwiched between a positive electrode layer and a negative electrode layer and which is superior to a conventional secondary battery with respect to at least one of volume, operation, and positioning. The present invention provides a secondary battery including a folded single-layer secondary cell formed by folding a sheet-shaped single-layer secondary cell, with a storage layer sandwiched between a positive electrode layer and a negative electrode layer, two or more times while alternately reversing the folding direction.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: May 15, 2018
    Assignees: KABUSHIKI KAISHA NIHON MICRONICS, GUALA TECHNOLOGY CO., LTD.
    Inventors: Takuo Kudoh, Kiyoyasu Hiwada, Shozo Izumo, Tomokazu Saito, Akira Nakazawa
  • Patent number: 9917330
    Abstract: Provided is a secondary battery being superior to a conventional secondary battery with respect to volume (energy density) and manufacturing (manufacturing workload). The present invention provides a secondary battery including a sheet-shaped first-electrode-functioning base material having a function as a first electrode and a function as a base material, a front-side storage layer formed on a front side of the first-electrode-functioning base material, a front-side second electrode layer layered on the front-side storage layer, a rear-side storage layer formed on a rear side of the first-electrode-functioning base material, and a rear-side second electrode layer layered on the rear-side storage layer.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: March 13, 2018
    Assignees: KABUSHIKI KAISHA NIHON MICRONICS, GUALA TECHNOLOGY CO., LTD.
    Inventors: Shozo Izumo, Tomokazu Saito, Akira Nakazawa
  • Patent number: 9748596
    Abstract: Provided is a secondary battery adopting an all-solid-state secondary cell structure with a storage layer sandwiched between a positive electrode layer and a negative electrode layer and which is superior to a conventional secondary battery with respect to at least one of volume, manufacturing, and positioning. The present invention provides a secondary battery including a single-layer secondary cell having a folded structure that a sheet-shaped single-layer secondary cell with a storage layer sandwiched between a positive electrode layer and a negative electrode layer is folded in two or four.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: August 29, 2017
    Assignees: Kabushiki Kaisha Nihon Micronics, Guala Technology Co., Ltd.
    Inventors: Takuo Kudoh, Kiyoyasu Hiwada, Shozo Izumo, Tomokazu Saito, Akira Nakazawa