Abstract: A thermosetting resin composition containing: (A) an addition reaction product of a maleimide compound having at least two N-substituted maleimide groups in one molecule (a1) and an amine compound having at least two primary amino groups in one molecule (a2), (B) a thermoplastic elastomer, and (C) a copolymer resin having a structural unit derived from an aromatic vinyl compound and a structural unit derived from a carboxylic acid anhydride.

Abstract: A thermosetting resin composition containing: (A) an addition reaction product of a maleimide compound having at least two N-substituted maleimide groups in one molecule (a1) and an amine compound having at least two primary amino groups in one molecule (a2), (B) a thermoplastic elastomer, and (C) a copolymer resin having a structural unit derived from an aromatic vinyl compound and a structural unit derived from a carboxylic acid anhydride.

Abstract: The CMP polishing solution of the invention comprises (A) a metal corrosion inhibitor containing a compound with a 1,2,3-triazolo[4,5-b]pyridine skeleton, (B) an abrasive grain having a positive zeta potential in the CMP polishing solution, (C) a metal oxide solubilizer and (D) an oxidizing agent. The polishing method of the invention comprises a first polishing step in which the conductive substance layer of a substrate comprising an interlayer insulating filth having an elevated section and a trench at the surface, a barrier layer formed following the surface of the interlayer insulating film and the conductive substance layer formed covering the barrier layer, is polished to expose the barrier layer located on the elevated section of the interlayer insulating film, and a second polishing step in which the barrier layer exposed in the first polishing step is polished using the CMP polishing solution to expose the elevated section of the interlayer insulating film.

Abstract: The CMP polishing liquid containing a medium and silica particles as an abrasive grain dispersed into the medium. The silica particles have a silanol group density of 5.0/nm2 or less and the biaxial average primary particle diameter when arbitrary 20 silica particles are selected from an image obtained by scanning electron microscope observation is 25 to 55 nm. The association degree of the silica particles is 1.1 or more. The CMP polishing liquid has the high barrier film polishing speed, the favorable abrasive grain dispersion stability, and the high interlayer dielectric polishing speed. The CMP polishing liquid can provide a method of producing semiconductor substrates or the like, that have excellent microfabrication, thin film formation, dimension accuracy, electric property and high reliability with low cost.

Abstract: The CMP polishing liquid containing a medium and silica particles as an abrasive grain dispersed into the medium. The silica particles have a silanol group density of 5.0/nm2 or less and the biaxial average primary particle diameter when arbitrary 20 silica particles are selected from an image obtained by scanning electron microscope observation is 25 to 55 nm. The association degree of the silica particles is 1.1 or more. The CMP polishing liquid has the high barrier film polishing speed, the favorable abrasive grain dispersion stability, and the high interlayer dielectric polishing speed. The CMP polishing liquid can provide a method of producing semiconductor substrates or the like, that have excellent microfabrication, thin film formation, dimension accuracy, electric property and high reliability with low cost.

Abstract: The CMP polishing liquid containing a medium and silica particles as an abrasive grain dispersed into the medium. The silica particles have a silanol group density of 5.0/nm2 or less and the biaxial average primary particle diameter when arbitrary 20 silica particles are selected from an image obtained by scanning electron microscope observation is 25 to 55 nm. The association degree of the silica particles is 1.1 or more. The CMP polishing liquid has the high barrier film polishing speed, the favorable abrasive grain dispersion stability, and the high interlayer dielectric polishing speed. The CMP polishing liquid can provide a method of producing semiconductor substrates or the like, that have excellent microfabrication, thin film formation, dimension accuracy, electric property and high reliability with low cost.

Abstract: A method of fabricating an interconnect element may include fabricating a metal layer that overlies a carrier layer and that includes a plurality of metal traces; providing a dielectric element to overlie the metal layer and the carrier layer; providing a plurality of metal posts; and removing the carrier layer to expose the first major surface of the dielectric element and the outer surfaces of the plurality of metal traces.

Abstract: The invention relates to a CMP polishing liquid comprising a medium and silica particles as an abrasive grain dispersed into the medium, characterized in that: (A1) the silica particles have a silanol group density of 5.0/nm2 or less; (B1) a biaxial average primary particle diameter when arbitrary 20 silica particles are selected from an image obtained by scanning electron microscope observation is 25 to 55 nm; and (C1) an association degree of the silica particles is 1.1 or more. The invention provides a CMP polishing liquid which has the high barrier film polishing speed, the favorable abrasive grain dispersion stability, and the high interlayer dielectric polishing speed, and a polishing method producing semiconductor substrates or the like, that have excellent microfabrication, thin film formation, dimension accuracy, electric property and high reliability with low cost.

Abstract: The CMP polishing solution of the invention comprises (A) a metal corrosion inhibitor containing a compound with a 1,2,3-triazolo[4,5-b]pyridine skeleton, (B) an abrasive grain having a positive zeta potential in the CMP polishing solution, (C) a metal oxide solubilizer and (D) an oxidizing agent. The polishing method of the invention comprises a first polishing step in which the conductive substance layer of a substrate comprising an interlayer insulating filth having an elevated section and a trench at the surface, a barrier layer formed following the surface of the interlayer insulating film and the conductive substance layer formed covering the barrier layer, is polished to expose the barrier layer located on the elevated section of the interlayer insulating film, and a second polishing step in which the barrier layer exposed in the first polishing step is polished using the CMP polishing solution to expose the elevated section of the interlayer insulating film.

Abstract: A method of fabricating an interconnect element may include fabricating a metal layer that overlies a carrier layer and that includes a plurality of metal traces; providing a dielectric element to overlie the metal layer and the carrier layer; providing a plurality of metal posts; and removing the carrier layer to expose the first major surface of the dielectric element and the outer surfaces of the plurality of metal traces.

Abstract: An interconnect element is provided which includes a dielectric element having a first major surface, a second major surface remote from the first major surface, and a plurality of recesses extending inwardly from the first major surface. A plurality of metal traces are embedded in the plurality of recesses, the metal traces having outer surfaces substantially co-planar with the first major surface and inner surfaces remote from the outer surfaces. A plurality of posts extend from the inner surfaces of the plurality of metal traces through the dielectric element, the plurality of posts having tops exposed at the second major surface. A multilayer wiring board including a plurality of such interconnect elements is also provided, as well as various methods for making such interconnect elements and multilayer wiring boards.

Abstract: The connection resistance between a metal bump (8) and a metal layer (10) for forming a wiring film deposited later is further decreased, the connection stability is enhanced, the wiring path passing through the metal bump (8) is further shortened, the planarity is enhanced, and the metal bump (8) does not come out easily. A wiring film interconnecting member wherein a plurality of pillar-like metal bumps (8) composed of copper and having a cross-sectional area of the top surface smaller than that of the bottom surface and interconnecting the wiring films of a multilayer wiring board are buried in an interlayer insulation film (10) in such a way that at least one end projects. The upper surface of the interlayer insulation film (10) is so curved as to be high at a part in contact with the metal bump (8) and lower gradually as being farther therefrom.

Abstract: An interconnect element is provided which includes a dielectric element having a first major surface, a second major surface remote from the first major surface, and a plurality of recesses extending inwardly from the first major surface. A plurality of metal traces are embedded in the plurality of recesses, the metal traces having outer surfaces substantially co-planar with the first major surface and inner surfaces remote from the outer surfaces. A plurality of posts extend from the inner surfaces of the plurality of metal traces through the dielectric element, the plurality of posts having tops exposed at the second major surface. A multilayer wiring board including a plurality of such interconnect elements is also provided, as well as various methods for making such interconnect elements and multilayer wiring boards.

Abstract: To increase the dimensional accuracy of an interlayer member used for producing a multilayer wiring board which is inserted between two wiring layers to establish interlayer insulation and interlayer electrical connection between the wiring layers, to thereby increase a layout density. A mask film is formed on a main surface of a sheet-like carrier layer. A metal column for interlayer connection is formed on the main surface of the carrier layer by plating a copper using the mask film as a mask. The mask film is removed. An interlayer insulating layer and a protective sheet are laminated on the main surface of the carrier layer in such a manner that the metal column for interlayer connection penetrates them. The interlayer insulating layer and the protective sheet are polished until the upper surface of the metal column for interlayer connection is exposed. Then, the carrier layer is removed. Furthermore, the protective sheet is removed.