Abstract: A compressor (31a, 31b) and an oil separator (35a, 35b) are provided in a refrigerant circuit (20). A flow-rate regulating valve (41a, 41b) is provided in an oil return pipe (40a, 40b) for returning a refrigerating-machine oil in the oil separator (35a, 35b) to the compressor (31a, 31b). A temperature sensor (42a, 42b) is provided downstream of the flow-rate regulating valve (41a, 41b) in the oil return pipe (40a, 40b). The oil-amount determiner (71a, 71b) determines whether an oil shortage state in which the amount of the refrigerating-machine oil held by the compressor (31a, 31b) is insufficient is present, on the basis of a measured value obtained by the temperature sensor (42a, 42b).

Abstract: A compressor (31a, 31b) and an oil separator (35a, 35b) are provided in a refrigerant circuit (20). A flow-rate regulating valve (41a, 41b) is provided in an oil return pipe (40a, 40b) for returning a refrigerating-machine oil in the oil separator (35a, 35b) to the compressor (31a, 31b). A temperature sensor (42a, 42b) is provided downstream of the flow-rate regulating valve (41a, 41b) in the oil return pipe (40a, 40b). The oil-amount determiner (71a, 71b) determines whether an oil shortage state in which the amount of the refrigerating-machine oil held by the compressor (31a, 31b) is insufficient is present, on the basis of a measured value obtained by the temperature sensor (42a, 42b).

Abstract: [Problem to be Solved] To provide a serial data transmission device that makes it possible to dynamically switch a band or a data transmission path and enhance the stability to failure while multiplexing and transmitting data by a TDM method when serial data is transmitted between a plurality of daisy-chained data transmission devices. [Solution] There is provided a serial data transmission device including: a receiver that receives data serially transmitted by a time-division multiplex method from another device daisy-chained to the serial data transmission device; a transmitter that serially transmits data by the time-division multiplex method to another device daisy-chained to the serial data transmission device; and a controller that controls serial transmission by the receiver and the transmitter, in which the controller performs control to make the serial transmission by the transmitter adjustable.

Abstract: A data reception device that can improve communication quality when transmitting/receiving serial data is to be provided. There is provided the data reception device including a signal generation unit that generates, from serial data received, a first signal whose value is inverted at a rising timing of the serial data and a second signal whose value is inverted at a falling timing of the serial data, and a clock recovery unit that performs clock recovery using the first signal and the second signal generated by the signal generation unit.

Abstract: [Problem to be Solved] To provide a serial data transmission device that makes it possible to dynamically switch a band or a data transmission path and enhance the stability to failure while multiplexing and transmitting data by a TDM method when serial data is transmitted between a plurality of daisy-chained data transmission devices. [Solution] There is provided a serial data transmission device including: a receiver that receives data serially transmitted by a time-division multiplex method from another device daisy-chained to the serial data transmission device; a transmitter that serially transmits data by the time-division multiplex method to another device daisy-chained to the serial data transmission device; and a controller that controls serial transmission by the receiver and the transmitter, in which the controller performs control to make the serial transmission by the transmitter adjustable.

Abstract: A data reception device that can improve communication quality when transmitting/receiving serial data is to be provided. There is provided the data reception device including: a signal generation unit that generates, from serial data received, a first signal whose value is inverted at a rising timing of the serial data and a second signal whose value is inverted at a falling timing of the serial data; and a clock recovery unit that performs clock recovery using the first signal and the second signal generated by the signal generation unit.

Abstract: Disclosed herein is a CDR circuit including delay elements, including: a divider having a delay element and configured to extract a clock by using, as a trigger, a data input with a signal transition regularly inserted; and a latch configured to latch an input data signal in synchronization with the clock extracted by the divider.

Abstract: Disclosed herein is a driver amplifier circuit, including: a first current source transistor of a first conductivity type, and a second current source transistor of the first conductivity type, control voltages being supplied to gates of the first current source transistor and the second current source transistor, respectively; a first switching transistor of the first conductivity type, and a second switching transistor of the first conductivity type; a third switching transistor of a second conductivity type, and a fourth switching transistor of the second conductivity type; first, second, third, and fourth resistor elements; and a first output node and a second output node.

Abstract: Disclosed herein is a clock data recovery circuit including: a first phase detector; a loop filter; a charge pump; a voltage-controlled oscillator; a second phase detector; a phase correction information generation section; and a phase correction information addition section.

Abstract: A phase adjustment circuit includes: a serial-to-parallel conversion section configured to convert serial data including a synchronization pattern inserted into a predetermined position into parallel data in response to a clock; a synchronization-pattern-position detection section configured to detect the position of the synchronization pattern in the parallel data generated by the serial-to-parallel conversion section; and an adjustment section configured to adjust the phases of the parallel data and the clock to conform to a position detected by the synchronization-pattern-position detection section as the position of the synchronization pattern in accordance with information on the position of the synchronization pattern.

Abstract: A method of manufacturing a flexible printed circuit board having an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: Disclosed herein is a CDR circuit including delay elements, including: a divider having a delay element and configured to extract a clock by using, as a trigger, a data input with a signal transition regularly inserted; and a latch configured to latch an input data signal in synchronization with the clock extracted by the divider.

Abstract: Disclosed herein is a driver amplifier circuit, including: a first current source transistor of a first conductivity type, and a second current source transistor of the first conductivity type, control voltages being supplied to gates of the first current source transistor and the second current source transistor, respectively; a first switching transistor of the first conductivity type, and a second switching transistor of the first conductivity type; a third switching transistor of a second conductivity type, and a fourth switching transistor of the second conductivity type; first, second, third, and fourth resistor elements; and a first output node and a second output node.

Abstract: Disclosed herein is a clock data recovery circuit including: a first phase detector; a loop filter; a charge pump; a voltage-controlled oscillator; a second phase detector; a phase correction information generation section; and a phase correction information addition section.

Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: An optical transmitter in which a microstripline is formed by a signal wiring pattern and a GND conductor pattern on a circuit board (including a flexible board), and a signal lead of a light emitting element module is mounted in a signal lead mounting hole connected with said signal wiring pattern so as to be connected with said signal wiring pattern, wherein a pattern adapted to add capacitance between a stem of said light emitting element module and said signal wiring pattern is provided on said signal wiring pattern on said circuit board, and wherein the pattern adapted to add capacitance has a size corresponding to ±50% of a capacitance C?L/Zo2, where Zo is signal line impedance, and L is the signal lead inductance.

Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: Optical transmission equipment with more than one power supply which can, when turning on the power supplies, set predetermined function of a signal processing circuit after a predetermined time period after the last turn-on of the power supply and can enable the operation of a drive circuit of the light emitting device after an additional predetermined time period.

Abstract: The present invention provides an optical transmission module having a laser diode that generates laser beams and a differential type current switch provided with a first switch and a second switch in order to supply a modulating current to the laser diode. A terminal of the laser diode and the first switch are connected in series through a first transmission line and a first capacitor, the other terminal of the laser diode and the second switch are connected in series through a second transmission line and a second capacitor. The current driven by the second switch is terminated by a resistor connected to the first switch and the current driven by the first switch is terminated by a resistor connected to the second switch. Thus, the laser diode is modulated bidirectionally.