Patents by Inventor Tomoko Chiba

Tomoko Chiba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8228093
    Abstract: A driver supplies data signal via a supply node. A voltage-relaxing transistor has a source connected to the supply node of the driver, a drain connected to a signal node connected to a signal line, and a gate to which the voltage at the signal node is applied.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: July 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Tomoko Chiba, Hirokazu Sugimoto, Toru Iwata
  • Publication number: 20110074465
    Abstract: A driver supplies data signal via a supply node. A voltage-relaxing transistor has a source connected to the supply node of the driver, a drain connected to a signal node connected to a signal line, and a gate to which the voltage at the signal node is applied.
    Type: Application
    Filed: December 9, 2010
    Publication date: March 31, 2011
    Applicant: Panasonic Corporation
    Inventors: Tomoko CHIBA, Hirokazu Sugimoto, Toru Iwata
  • Patent number: 7461108
    Abstract: When a barrel shift device is divided into pipeline registers and a shift process is executed in a multistage process stage, by decoding a second control signal for controlling a shift amount of a second shift circuit 50 using a decoding circuit 20, it is detected at what digit positions in intermediate data in an intermediate data holding circuit 30 data elements which are to be finally output as output data from the second shift circuit 50 are located. Based on a result of the detection of digit positions by the decoding circuit 20, the intermediate data holding circuit 30 holds only data elements to be finally output, among data elements in the intermediate data, and does not hold unnecessary data elements which are not included in the output data. Therefore, by controlling a data storage operation in the intermediate data holding circuit 30, an increase in power due to the pipeline structure is suppressed.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: December 2, 2008
    Assignee: Panasonic Corporation
    Inventors: Kazufumi Tanoue, Daisuke Takeuchi, Tomoko Chiba
  • Publication number: 20070180007
    Abstract: When a barrel shift device is divided into pipeline registers and a shift process is executed in a multistage process stage, by decoding a second control signal for controlling a shift amount of a second shift circuit 50 using a decoding circuit 20, it is detected at what digit positions in intermediate data in an intermediate data holding circuit 30 data elements which are to be finally output as output data from the second shift circuit 50 are located. Based on a result of the detection of digit positions by the decoding circuit 20, the intermediate data holding circuit 30 holds only data elements to be finally output, among data elements in the intermediate data, and does not hold unnecessary data elements which are not included in the output data. Therefore, by controlling a data storage operation in the intermediate data holding circuit 30, an increase in power due to the pipeline structure is suppressed.
    Type: Application
    Filed: August 31, 2005
    Publication date: August 2, 2007
    Inventors: Kazufumi Tanoue, Daisuke Takeuchi, Tomoko Chiba