Patents by Inventor Tomoko Hisaki

Tomoko Hisaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4434224
    Abstract: In a method of pattern formation according to this invention, an organic polymer resist material is simultaneously used with an inorganic resist material, i.e., a first desired pattern consisting of the organic polymer resist material layer is formed on a substrate material, then the whole surface thereof is covered with the inorganic resist material layer, a second desired pattern is then formed with the inorganic resist material layer, and then the resulting second desired pattern is transferred to the organic polymer resist material. According to the invention, mask alignment can automatically be effected by detecting reflected light from an alignment mark on the substrate, formation of a relief including large and small patterns is also easily carried out, throughput can also be increased. The method of the invention may be combined with various process steps, so that such combined method is applicable for deep and shallow etching, formation of an interlayer insulation film, and lift-off method.
    Type: Grant
    Filed: January 29, 1982
    Date of Patent: February 28, 1984
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Akira Yoshikawa, Akitsu Takeda, Osamu Ochi, Tomoko Hisaki, Yoshihiko Mizushima
  • Patent number: 4350541
    Abstract: A method for fabricating semiconductor devices comprising the steps of: forming on the main surface of a semiconductor substrate an inorganic photoresist layer having a first amorphous layer, which contains Se as a matrix component and includes an impurity for providing one conductivity type and a second silver, or a silver containing layer, formed on the first layer; exposing the inorganic photoresist layer with an exposure pattern; developing the exposed inorganic photoresist layer to form a patterned impurity containing inorganic photoresist layer as an impurity source layer; forming a heat resistive overcoating layer on the main surface of the semiconductor substrate, while covering the impurity source layer; and forming a doped region by diffusing impurity from the impurity source layer into a region of the substrate underlying the impurity source layer.
    Type: Grant
    Filed: July 31, 1980
    Date of Patent: September 21, 1982
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Yoshihiko Mizushima, Akitsu Takeda, Akira Yoshikawa, Osamu Ochi, Tomoko Hisaki
  • Patent number: 4320191
    Abstract: This invention relates to a pattern-forming process using a radiation sensitive chalcogenide layer composed of a laminate of amorphous chalcogenide layer (2) and thin silver layer (3), and discloses a pattern-forming process characterized by etching out an amorphous chalcogenide layer (22) not doped with silver at an unexposed area under an irradiation of a light (6) or an accelerated corpuscular beam by a plasma etching with a fluorine-series gas and also a pattern-forming process wherein silver-doped amorphous chalcogenide layer (21) left on the substrate according to a given pattern by the above process is used as an etching mask and then the substrate layer (1c) is etched out by a plasma etching to form the given pattern on the substrate.
    Type: Grant
    Filed: July 7, 1980
    Date of Patent: March 16, 1982
    Assignee: Nippon Telegraph & Telephone Public Corporation
    Inventors: Akira Yoshikawa, Osamu Ochi, Tomoko Hisaki, Yoshihiko Mizushima