Abstract: A method is provided for testing a semiconductor integrated circuit by utilizing a scan path circuit provided to detect the degeneracy fault in the semiconductor integrated circuit, and bringing scan chains to states in which shift resistor operations can be effected for the input of patterns by which a glitch fault and the IR-DROP fault between the scan chains can be detected.

Abstract: Not only defects in DC characteristics and a degeneracy fault but defects in AC characteristics such as SI faults (a crosstalk faults and an IR-DROP fault) and a delay fault, which tend to increase as design rules become finer in recent years, are detected as a measure used when the finished quality of a semiconductor integrated circuit is evaluated. The defects in the AC characteristics are detected by utilizing a scan path circuit provided to detect the degeneracy fault in the semiconductor integrated circuit, bringing scan chains to states in which shift resistor operations can be effected for the input of patterns by which a glitch fault and the IR-DROP fault between the scan chains can be detected, and not only utilizing variations in power supply voltage fed to the semiconductor integrated circuit and in signal voltage inputted to scan-in terminals but also varying the frequency of the test patterns.

Abstract: A method is provided for testing a semiconductor integrated circuit by utilizing a scan path circuit provided to detect the degeneracy fault in the semiconductor integrated circuit, and bringing scan chains to states in which shift resistor operations can be effected for the input of patterns by which a glitch fault and the IR-DROP fault between the scan chains can be detected.

Abstract: The semiconductor device includes: an A/D conversion circuit for A/D-converting an analog input signal and outputting a resultant conversion result; and a computation circuit for performing, in synchronization with the A/D conversion circuit, computation for an updated conversion result without storing the updated conversion result every time the conversion result from the A/D conversion circuit is updated, to determine one computation result from a plurality of conversion results from the A/D conversion circuit and output the computation result.

Abstract: The semiconductor device of the present invention includes: an A/D conversion circuit for A/D-converting an analog input signal and outputting a resultant conversion result; and a computation circuit for performing, in synchronization with the A/D conversion circuit, computation for an updated conversion result without storing the updated conversion result every time the conversion result from the A/D conversion circuit is updated, to determine one computation result from a plurality of conversion results from the A/D conversion circuit and output the computation result.

Abstract: Not only defects in DC characteristics and a degeneracy fault but defects in AC characteristics such as SI faults (a crosstalk faults and an IR-DROP fault) and a delay fault, which tend to increase as design rules become finer in recent years, are detected as a measure used when the finished quality of a semiconductor integrated circuit is evaluated. The defects in the AC characteristics are detected by utilizing a scan path circuit provided to detect the degeneracy fault in the semiconductor integrated circuit, bringing scan chains to states in which shift resistor operations can be effected for the input of patterns by which a glitch fault and the IR-DROP fault between the scan chains can be detected, and not only utilizing variations in power supply voltage fed to the semiconductor integrated circuit and in signal voltage inputted to scan-in terminals but also varying the frequency of the test patterns.