Patents by Inventor Tomoko Yamane

Tomoko Yamane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965072
    Abstract: Provided is a semiaromatic polyamide fil having an average linear expansion coefficient in the width direction, measured under conditions of 20 to 125° C., of ?90 to 0 ppm/° C.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: April 23, 2024
    Assignee: UNITIKA LTD.
    Inventors: Yuki Aoyama, Takashi Okabe, Shuhei Yamane, Tomoko Yamanaka
  • Patent number: 6333548
    Abstract: There are provided a semiconductor device and a method for manufacturing the same in which a thin film polysilicon film having a small parasitic capacitance which is required for attaining the high-speed operation and high reliability can be used as a resistance element, the process margin can be increased without increasing the number of manufacturing steps, and defects due to leakage between the resistance element and the underlying substrate can be eliminated so as to ensure the high manufacturing yield. In a semiconductor device having a conductive film formed over the surface of a semiconductor substrate with a first insulating film disposed therebetween and a metal wiring layer connected to the conductive film via a contact hole formed in a second insulating film which is formed on the conductive film, an etching stopper film having a selective etching ratio with respect to the second insulating film is formed in an area directly below the contact hole with a third insulating film disposed therebetween.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: December 25, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoko Yamane, Norihisa Arai
  • Patent number: 6020229
    Abstract: There are provided a semiconductor device and a method for manufacturing the same in which a thin film polysilicon film having a small parasitic capacitance which is required for attaining the high-speed operation and high reliability can be used as a resistance element, the process margin can be increased without increasing the number of manufacturing steps, and defects due to leakage between the resistance element and the underlying substrate can be eliminated so as to ensure the high manufacturing yield. In a semiconductor device having a conductive film formed over the surface of a semiconductor substrate with a first insulating film disposed therebetween and a metal wiring layer connected to the conductive film via a contact hole formed in a second insulating film which is formed on the conductive film, an etching stopper film having a selective etching ratio with respect to the second insulating film is formed in an area directly below the contact hole with a third insulating film disposed therebetween.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: February 1, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoko Yamane, Norihisa Arai
  • Patent number: 5930169
    Abstract: Electrically erasable and writable nonvolatile memory cells are arranged. After erasing the data in at least part of the memory cells, light-writing is done by applying, to the memory cells erased from, a bias whose pulse width is shorter or whose write voltage is lower than in an ordinary write operation. Then, a property-degraded cell which is in a written state is detected from among the memory cells subjected to light-writing. Because the property-degraded cell can be found in this way, the lifetime of the chip can be improved by, for example, replacing the defective cell with a normal cell.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihisa Iwata, Tomoko Yamane