Patents by Inventor Tomomi Ishikura

Tomomi Ishikura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DATA PROCESSOR
    Publication number: 20080046697
    Abstract: The present invention prevents a data processor from undesirable operation stop due to an overflow of a plurality of register banks. A status register includes an overflow flag to indicate an overflow of the plurality of register banks. When an interrupt exception occurs in a state in which data has been saved to all banks of the register banks, and the accepted interrupt exception is permitted to use the register banks, a central processing unit saves data of a register set to a stack area and reflects an overflow state in the overflow flag. When the overflow flag indicates an overflow state, if data restoration from the register banks to the register set is directed, the central processing unit restores the data from the stack area to the register set.
    Type: Application
    Filed: October 6, 2007
    Publication date: February 21, 2008
    Inventors: Yasuo SUGURE, Tomomi ISHIKURA, Kazuya HIRAYANAGI, Takeshi KATAOKA, Seiji TAKEUCHI, Hiromichi YAMADA, Takanaga YAMAZAKI
  • Data processor employing register banks with overflow protection to enhance interrupt processing and task switching
    Patent number: 7290124
    Abstract: The present invention prevents a data processor from undesirable operation stop due to an overflow of a plurality of register banks. A status register includes an overflow flag to indicate an overflow of the plurality of register banks. When an interrupt exception occurs in a state in which data has been saved to all banks of the register banks, and the accepted interrupt exception is permitted to use the register banks, a central processing unit saves data of a register set to a stack area and reflects an overflow state in the overflow flag. When the overflow flag indicates an overflow state, if data restoration from the register banks to the register set is directed, the central processing unit restores the data from the stack area to the register set.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: October 30, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Yasuo Sugure, Tomomi Ishikura, Kazuya Hirayanagi, Takeshi Kataoka, Seiji Takeuchi, Hiromichi Yamada, Takanaga Yamazaki
  • Data processor
    Publication number: 20040107337
    Abstract: The present invention prevents a data processor from undesirable operation stop due to an overflow of a plurality of register banks. A status register includes an overflow flag to indicate an overflow of the plurality of register banks. When an interrupt exception occurs in a state in which data has been saved to all banks of the register banks, and the accepted interrupt exception is permitted to use the register banks, a central processing unit saves data of a register set to a stack area and reflects an overflow state in the overflow flag. When the overflow flag indicates an overflow state, if data restoration from the register banks to the register set is directed, the central processing unit restores the data from the stack area to the register set.
    Type: Application
    Filed: October 23, 2003
    Publication date: June 3, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Yasuo Sugure, Tomomi Ishikura, Kazuya Hirayanagi, Takeshi Kataoka, Seiji Takeuchi, Hiromichi Yamada, Takanaga Yamazaki