Patents by Inventor Tomomi Kuraguchi

Tomomi Kuraguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11830920
    Abstract: A semiconductor device includes a semiconductor part including a first semiconductor layer of a first conductivity type; a first electrode provided on a back surface of the semiconductor part; and a second electrode provided on a front surface of the semiconductor part. The second electrode includes a barrier layer and a metal layer. The barrier layer contacts the first semiconductor layer and including vanadium or a vanadium compound as a major component. The metal layer is provided on the barrier layer.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: November 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Naofumi Hirata, Tomomi Kuraguchi, Shinichi Ueki, Yoichi Hori, Kei Tanihira
  • Publication number: 20220293762
    Abstract: A semiconductor device includes a semiconductor part including a first semiconductor layer of a first conductivity type; a first electrode provided on a back surface of the semiconductor part; and a second electrode provided on a front surface of the semiconductor part. The second electrode includes a barrier layer and a metal layer. The barrier layer contacts the first semiconductor layer and including vanadium or a vanadium compound as a major component. The metal layer is provided on the barrier layer.
    Type: Application
    Filed: August 19, 2021
    Publication date: September 15, 2022
    Inventors: Naofumi HIRATA, Tomomi KURAGUCHI, Shinichi UEKI, Yoichi HORI, Kei TANIHIRA
  • Publication number: 20140287576
    Abstract: According to one embodiment, a semiconductor device manufacturing method includes: forming a film to be a first metal layer on a substrate where an element portion is formed; forming a first insulating layer provided with an opening on the film to be the first metal layer; forming a second metal layer in the opening of the first insulating layer; eliminating the first insulating layer; eliminating the film to be the first metal layer with the second metal layer used as a mask so as to form the first metal layer; and forming an electrode portion by covering exposed surfaces of the first metal layer and the second metal layer with a third metal layer including a metal of a smaller ionization tendency than the metal of the second metal layer.
    Type: Application
    Filed: September 3, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tomomi KURAGUCHI
  • Patent number: 8841210
    Abstract: According to one embodiment, a semiconductor device manufacturing method includes: forming a film to be a first metal layer on a substrate where an element portion is formed; forming a first insulating layer provided with an opening on the film to be the first metal layer; forming a second metal layer in the opening of the first insulating layer; eliminating the first insulating layer; eliminating the film to be the first metal layer with the second metal layer used as a mask so as to form the first metal layer; and forming an electrode portion by covering exposed surfaces of the first metal layer and the second metal layer with a third metal layer including a metal of a smaller ionization tendency than the metal of the second metal layer.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: September 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomomi Kuraguchi
  • Publication number: 20120313162
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor substrate; an arsenic diffusion layer formed in the semiconductor substrate and containing arsenic; and a metal film formed on the arsenic diffusion layer. The metal film includes at least one metal selected from the group consisting of tungsten, titanium, ruthenium, hafnium, and tantalum, and arsenic.
    Type: Application
    Filed: March 20, 2012
    Publication date: December 13, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Matsuda, Tomomi Kuraguchi