Abstract: A semiconductor device and a defect analysis method of a semiconductor device, in which a failure location can be easily identified. The semiconductor device is provided with at least 2N resistor patterns having a fixed form, and being divided into N groups; the resistor patterns of each group are disposed in parallel, in sequence, and at an equal pitch, so that (N?1) resistor patterns of another group interpose between a resistor pattern of each of the groups and another resistor pattern within the group in question; the resistor patterns of each of the groups is connected in series with other resistor patterns with the group; and the resistor patterns of each of the groups, which are connected in series, are additionally connected in series to resistor patterns of another group. Measuring pads are provided respectively between two ends of resistor patterns that are connected in series, and groups.

Abstract: A semiconductor device and a defect analysis method of a semiconductor device, in which a failure location can be easily identified. The semiconductor device is provided with at least 2N resistor patterns having a fixed form, and being divided into N groups; the resistor patterns of each group are disposed in parallel, in sequence, and at an equal pitch, so that (N?1) resistor patterns of another group interpose between a resistor pattern of each of the groups and another resistor pattern within the group in question; the resistor patterns of each of the groups is connected in series with other resistor patterns with the group; and the resistor patterns of each of the groups, which are connected in series, are additionally connected in series to resistor patterns of another group. Measuring pads are provided respectively between two ends of resistor patterns that are connected in series, and groups.

Abstract: A failure diagnosing method of logic circuits includes generating failure candidate data for logic circuits based on failure diagnosis data obtained from the logic circuits by using a failure diagnosis tool; and inputting the failure candidate data for the logic circuits. A predetermined data is extracted from each of the failure candidate data for the logic circuits. Failures of the logic circuits are diagnosed by collecting a name of each of the failure candidate data from the predetermined data and the number of failure candidate data; and the collected data are outputted on a display unit.

Abstract: A failure diagnosing method of logic circuits includes generating failure candidate data for logic circuits based on failure diagnosis data obtained from the logic circuits by using a failure diagnosis tool; and inputting the failure candidate data for the logic circuits. A predetermined data is extracted from each of the failure candidate data for the logic circuits. Failures of the logic circuits are diagnosed by collecting a name of each of the failure candidate data from the predetermined data and the number of failure candidate data; and the collected data are outputted on a display unit.