Patents by Inventor TOMOMITSU MURAISHI

TOMOMITSU MURAISHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230134880
    Abstract: It is aimed to provide a laminated varistor capable of reducing stray capacitance to occur between an internal electrode and an external electrode, and also capable of reducing a variation in the stray capacitance due to a variation in the external electrode. A laminated varistor of the present disclosure has external electrodes on first end surface, second end surface, and first side surface of sintered body. No external electrode is provided on second side surface opposite to first side surface. Varistor regions in which internal electrodes overlap each other in a laminating direction are provided at positions closer to second side surface than to first side surface.
    Type: Application
    Filed: September 24, 2020
    Publication date: May 4, 2023
    Inventors: SAYAKA MATSUMOTO, KEN YANAI, MASASHI TAKAMURA, MASAYA HATTORI, TOMOMITSU MURAISHI
  • Publication number: 20230104285
    Abstract: A stacked varistor having a small variation in electrostatic capacitance is obtained. The stacked varistor includes first internal electrode projection extending from third internal electrode toward first end surface between first side surface and first varistor region, and second internal electrode projection extending from third internal electrode toward second end surface between first side surface and second varistor region . First internal electrode projection extends closer to first end surface than a line connecting point closest to first end surface of first varistor region and point closest to first end surface of third external electrode is. Second internal electrode projection extends closer to second end surface than a line connecting point closest to second end surface of second varistor region and point closest to second end surface of third external electrode is.
    Type: Application
    Filed: March 18, 2021
    Publication date: April 6, 2023
    Inventors: MASASHI TAKAMURA, KEN YANAI, SAYAKA WATANABE, TOMOMITSU MURAISHI