Patents by Inventor Tomonao Kikuchi
Tomonao Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220254748Abstract: An electronic device characterized by including a substrate, a bonding layer provided on the substrate, the bonding layer containing copper in an amount of greater than 0 mass % but 60 mass % or less, the copper having its crystal grain size of 50 nm or less, an electronic component provided on the bonding layer, and a coating film covering a side of the bonding layer, the coating film containing at least one compound selected from copper (I) oxide (Cu2O) and copper (II) oxide (CuO).Type: ApplicationFiled: June 10, 2020Publication date: August 11, 2022Applicant: KYOCERA CorporationInventor: Tomonao KIKUCHI
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Publication number: 20220037049Abstract: Copper particles coated with at least one kind of a nitrogen-containing compound selected from hydrazinoethanol and a hydrazinoethanol salt.Type: ApplicationFiled: December 3, 2019Publication date: February 3, 2022Applicant: KYOCERA CorporationInventor: Tomonao KIKUCHI
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Patent number: 10379303Abstract: To provide an optical module and a method for aligning the optical module with which alignment can be easily performed. An optical module includes first optical element sections and a second optical element section optically joined to the first optical element sections. Each first optical element section includes an optical conversion element, a ferrule having a distal end being in contact with and optically joined to the second optical element section, and a first optical system disposed in a position where the ferrule and the optical conversion element are optically adjusted. The second optical element section includes joining sections in contact with and joined to, in joining parts, the distal ends of the ferrules, a wavelength multiplexing optical element optically joined to the optical conversion elements, and second optical systems respectively disposed in positions where the wavelength multiplexing optical elements and the joining parts are optically adjusted.Type: GrantFiled: March 22, 2017Date of Patent: August 13, 2019Assignee: Oclaro Japan, Inc.Inventors: Naohiko Baba, Hiroshi Yamamoto, Tomonao Kikuchi, Yasuhiro Yamada
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Publication number: 20170276889Abstract: To provide an optical module and a method for aligning the optical module with which alignment can be easily performed. An optical module includes first optical element sections and a second optical element section optically joined to the first optical element sections. Each first optical element section includes an optical conversion element, a ferrule having a distal end being in contact with and optically joined to the second optical element section, and a first optical system disposed in a position where the ferrule and the optical conversion element are optically adjusted. The second optical element section includes joining sections in contact with and joined to, in joining parts, the distal ends of the ferrules, a wavelength multiplexing optical element optically joined to the optical conversion elements, and second optical systems respectively disposed in positions where the wavelength multiplexing optical elements and the joining parts are optically adjusted.Type: ApplicationFiled: March 22, 2017Publication date: September 28, 2017Inventors: Naohiko BABA, Hiroshi YAMAMOTO, Tomonao KIKUCHI, Yasuhiro YAMADA
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Patent number: 7643954Abstract: A master station includes a group of circuits for performing an optimization method. In such a system, the optimization is achieved by adjusting the pull-up resistance and by setting the best possible clock frequency to ensure that data/clock high and low voltage levels are within predetermined specifications. An optimization procedure is performed in a calibration phase invoked by a user or a system whenever a change is introduced to the system, such as addition or deletion of slave stations, a change of data/clock lines, or a change that may affect on the electrical and timing characteristics of the two-wire communication system.Type: GrantFiled: May 30, 2007Date of Patent: January 5, 2010Assignee: Opnext Japan, Inc.Inventors: Antony Cleitus, Hiroo Matsue, Tomonao Kikuchi, Shigeru Tokita
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Patent number: 7552872Abstract: A reader/writer is provided which is capable of speedily recognizing a correspondence between one end and the other end of a fiber-optic cable when a plurality of fiber-optic cables is laid. The reader/writer according to the present invention reads, on receiving through the fiber-optic cable a signal that is an instruction to read data from a RF tag mounted to an end of the fiber-optic cable, data from the RF tag through radio communication, and transmits the read data through the fiber-optic cable. Also, on receiving through the fiber-optic cable a signal that is an instruction to write data into the RF tag and a signal indicating the write data, the reader/writer writes the write instruction and the write data into the RF tag through radio communication.Type: GrantFiled: February 5, 2007Date of Patent: June 30, 2009Assignee: Opnext Japan, Inc.Inventors: Shigeru Tokita, Hiroo Matsue, Antony Cleitus, Tomonao Kikuchi
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Publication number: 20070296553Abstract: A reader/writer is provided which is capable of speedily recognizing a correspondence between one end and the other end of a fiber-optic cable when a plurality of fiber-optic cables is laid. The reader/writer according to the present invention reads, on receiving through the fiber-optic cable a signal that is an instruction to read data from a RF tag mounted to an end of the fiber-optic cable, data from the RF tag through radio communication, and transmits the read data through the fiber-optic cable. Also, on receiving through the fiber-optic cable a signal that is an instruction to write data into the RF tag and a signal indicating the write data, the reader/writer writes the write instruction and the write data into the RF tag through radio communication.Type: ApplicationFiled: February 5, 2007Publication date: December 27, 2007Inventors: Shigeru Tokita, Hiroo Matsue, Antony Cleitus, Tomonao Kikuchi
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Publication number: 20070286319Abstract: A master station includes a group of circuits for performing an optimization method. In such a system, the optimization is achieved by adjusting the pull-up resistance and by setting the best possible clock frequency to ensure that data/clock high and low voltage levels are within predetermined specifications. An optimization procedure is performed in a calibration phase invoked by a user or a system whenever a change is introduced to the system, such as addition or deletion of slave stations, a change of data/clock lines, or a change that may affect on the electrical and timing characteristics of the two-wire communication system.Type: ApplicationFiled: May 30, 2007Publication date: December 13, 2007Inventors: Antony Cleitus, Hiroo Matsue, Tomonao Kikuchi, Shigeru Tokita
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Publication number: 20040004179Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.Type: ApplicationFiled: June 24, 2003Publication date: January 8, 2004Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi
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Patent number: 6603110Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.Type: GrantFiled: June 27, 2002Date of Patent: August 5, 2003Assignees: Hitachi, Ltd., Hitachi Communication System, Inc., Hitachi Video and Information System, Inc.Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi
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Publication number: 20030029991Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.Type: ApplicationFiled: June 27, 2002Publication date: February 13, 2003Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi
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Patent number: 6501583Abstract: Two sets of a high speed differential amplifier and a low speed differential amplifier are prepared, and frequency response speeds of these high speed/low speed differential amplifiers are different from each other. Both an oscillating frequency and a frequency modulation sensitivity of a ring oscillator type voltage-controlled oscillator circuit can be separately set by adding two outputs of these differential amplifiers to each other and by varying the selection ratio of these high speed/low speed differential amplifiers in a linear manner. Thus, the setting ranges for the oscillating frequency and the frequency modulation sensitivity are enlarged. At this time, since a summation of currents flowing through the high speed/low speed differential amplifiers is continuously made constant, the oscillating frequency depending characteristic of the output amplitude of the VCO circuit can be canceled.Type: GrantFiled: October 14, 1999Date of Patent: December 31, 2002Assignee: OpNext Japan, Inc.Inventors: Mitsuo Akashi, Hiroki Irie, Yasuhiro Yamada, Akihiro Hayami, Naohiko Baba, Tomonao Kikuchi
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Patent number: 6426495Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.Type: GrantFiled: June 26, 2000Date of Patent: July 30, 2002Assignees: Hitachi, Ltd., Hitachi Communication System, Inc., Hitachi Video and Information System, Inc.Inventors: Akihiro Hayami, Tadaaki Fujii, Tomonao Kikuchi, Tadashi Hatano, Yasuhiro Yamada, Takayuki Nakao, Tomoaki Shimotsu, Toshiaki Murai, Tohru Oyama, Hidehiro Ikeuchi, Masayuki Miyoshi