Abstract: A transmission circuit includes a first impedance circuit, a second impedance circuit, and a phase shifter. Each of the first impedance circuit and the second impedance circuit includes a register circuitry and a control circuitry that controls a resistance value of the register circuitry. The first impedance circuit is configured to output a reflected wave of an input signal to the phase shifter. The phase shifter is configured to shift a phase of the input signal to input the input signal to the first impedance circuit and to shift a phase of the reflected wave of the input signal output from the first impedance circuit to output the reflected wave to the combiner circuit. The second impedance circuit is configured to output the reflected wave of the input signal to the combiner circuit.

Abstract: A combiner circuit includes a transmission circuit to be connected to an antenna, and a control circuit configured to control impedance of the transmission circuit. The transmission circuit includes multiple impedance circuits having different impedances from each other, and multiple switch elements, each of which is connected to a corresponding one of the multiple impedance circuits. The control circuit includes multiple comparators, each of which is connected to a corresponding one of the multiple switch elements, and a voltage divider circuit including multiple resistive elements, each of which is configured to divide an input reference voltage and output a divided voltage power to a corresponding one of the multiple comparators.

Abstract: A transmission circuit includes: a plurality of impedance circuits having impedances different from each other, a plurality of first switch elements, any one of which is being connected to a respective one of the plurality of impedance circuits, and a first control circuit configured to control opening and closing of the plurality of first switch elements. The first control circuit is configured to be controllable to selectively change the opening and closing of the plurality of first switch elements and to rotate a reflection coefficient of an output terminal on an antenna side of the transmission circuit in a complex plane.

Abstract: A communication module includes an antenna, a transmission circuit, a reception circuit, and a controller. The antenna includes a first antenna element at a transmission side and a second antenna element at a reception side and has an isolation characteristic between the first antenna element and the second antenna element. The transmission circuit is connected to the first antenna element. The reception circuit is connected to the second antenna element. The antenna includes a first variable phase unit configured to vary a phase of a transmission wave to be transmitted from the first antenna element and a second variable phase unit configured to vary a phase of a reception wave to be received by the second antenna element. The controller controls at least one of the first variable phase unit or the second variable phase unit to control an isolation of the antenna.

Abstract: A buffer control system and a buffer controllable memory are provided that remedy the problem of increased current consumption at a time of lower clock speed. A buffer control system 10 includes a processor 100 for outputting a memory control signal 500 that determines its on/off time depending upon the clock speed, and an operation mode switching signal 800 that indicates either a high-speed operation mode or low-speed operation mode. An external memory 200, connected to the processor 100, sends and receives data, and has a bus buffer 210 whose on/off time is determined according to a memory control signal 600 input thereto. A buffer controller 900, connected between the processor 100 and external memory 200, contains a timer 400 triggered by the memory control signal 500 from the processor 100.