Patents by Inventor Tomonari IWASAKI

Tomonari IWASAKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130286742
    Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array includes memory cells and a word line coupling the memory cells. A determination circuit determines whether write to a first memory cell group of the word line succeeded, and whether write to a second memory cell group of the word line succeeded. A test circuit counts application of write voltage during write to the word line, compares with a threshold a difference between a count of write voltage application upon success of one of respective writes to the first and second memory cell groups and a count of write voltage application upon success of the other of respective the writes, and outputs a result of the comparison.
    Type: Application
    Filed: March 13, 2013
    Publication date: October 31, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuji KOMINE, Mitsuhiro KOGA, Yukio KOMATSU, Tomonari IWASAKI