Patents by Inventor Tomonori Aoyama
Tomonori Aoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11862696Abstract: A semiconductor storage device relating to one embodiment includes: a stacked body in which electrode films and insulating films are alternately stacked in a first direction; a first and a second charge storage films that are arranged away from each other in the first direction inside the stacked body and each face one of the electrode films; and a tunnel insulating film that extends in the first direction inside the stacked body and is in contact with the first and the second charge storage films. The first and the second charge storage films each include a first film that is in contact with the electrode film and contains a High-k material, and a second film that is provided between the first film and the tunnel insulating film and contains silicon nitride.Type: GrantFiled: December 14, 2020Date of Patent: January 2, 2024Assignee: Kioxia CorporationInventors: Shunsuke Okada, Tomonori Aoyama, Tatsunori Isogai, Masaki Noguchi
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Publication number: 20220415920Abstract: According to one embodiment, a semiconductor memory device includes a circuitry layer, first conductive layers, a pillar layer, and a second conductive layer. The circuitry layer is provided on a substrate and includes a CMOS circuit. The first conductive layers are provided above the circuitry layer, and are stacked with an insulation layer interposed therebetween. The pillar layer crosses the first conductive layers, and includes silicon single crystal. The second conductive layer is provided on the pillar layer and includes silicon single crystal containing impurities. The first conductive layers are provided between the circuitry layer and the second conductive layer.Type: ApplicationFiled: August 29, 2022Publication date: December 29, 2022Applicant: Kioxia CorporationInventors: Shuto YAMASAKA, Tomonori AOYAMA
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Publication number: 20220013539Abstract: In one embodiment, a semiconductor device includes a stacked film including a plurality of electrode layers and a plurality of insulating layers alternately stacked in a first direction. The device further includes a columnar portion including a charge storage layer and a first semiconductor layer extending through the stacked film in the first direction, the first semiconductor layer including an impurity element. The device further includes a second semiconductor layer or a first insulator provided on the stacked film and the columnar portion, the second semiconductor layer or the first insulator including the impurity element and having a concentration gradient of the impurity element in the first direction.Type: ApplicationFiled: March 16, 2021Publication date: January 13, 2022Applicant: Kioxia CorporationInventors: Tatsunori ISOGAI, Shunsuke OKADA, Tomonori AOYAMA, Masaki NOGUCHI
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Patent number: 11139378Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer, a charge storage layer provided on the surface of the semiconductor layer via a first insulating film, and an electrode layer provided on the surface of the charge storage layer via a second insulating film. The first insulating film includes a first region where the compositional ratio of nitrogen to silicon, oxygen and nitrogen varies from a first value to a second value, which is lower than the first value, along a first direction from the semiconductor layer toward the charge storage layer.Type: GrantFiled: August 29, 2019Date of Patent: October 5, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masaki Noguchi, Tatsunori Isogai, Tomonori Aoyama
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Publication number: 20210296458Abstract: A semiconductor storage device relating to one embodiment includes: a stacked body in which electrode films and insulating films are alternately stacked in a first direction; a first and a second charge storage films that are arranged away from each other in the first direction inside the stacked body and each face one of the electrode films; and a tunnel insulating film that extends in the first direction inside the stacked body and is in contact with the first and the second charge storage films. The first and the second charge storage films each include a first film that is in contact with the electrode film and contains a High-k material, and a second film that is provided between the first film and the tunnel insulating film and contains silicon nitride.Type: ApplicationFiled: December 14, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Shunsuke OKADA, Tomonori AOYAMA, Tatsunori ISOGAI, Masaki NOGUCHI
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Publication number: 20200295201Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer, a charge storage layer provided on the surface of the semiconductor layer via a first insulating film, and an electrode layer provided on the surface of the charge storage layer via a second insulating film. The first insulating film includes a first region where the compositional ratio of nitrogen to silicon, oxygen and nitrogen varies from a first value to a second value, which is lower than the first value, along a first direction from the semiconductor layer toward the charge storage layer.Type: ApplicationFiled: August 29, 2019Publication date: September 17, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Masaki NOGUCHI, Tatsunori ISOGAI, Tomonori AOYAMA
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Patent number: 10741383Abstract: In one embodiment, a method of manufacturing a semiconductor device includes alternately forming a plurality of first films and a plurality of second films on a substrate, and forming an opening in the first and second films. The method further includes sequentially forming a first insulator, a charge storage layer, a second insulator and a semiconductor layer on surfaces of the first and second films in the opening. The second insulator includes a silicon oxynitride film, and the silicon oxynitride film is formed using a first gas that includes silicon and a first element, a second gas that includes oxygen and nitrogen, and a third gas that includes a second element that reacts with the first element.Type: GrantFiled: September 6, 2018Date of Patent: August 11, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masaki Noguchi, Tatsunori Isogai, Tomonori Aoyama
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Publication number: 20190296041Abstract: According to one embodiment, a semiconductor memory device includes a circuitry layer, first conductive layers, a pillar layer, and a second conductive layer. The circuitry layer is provided on a substrate and includes a CMOS circuit. The first conductive layers are provided above the circuitry layer, and are stacked with an insulation layer interposed therebetween. The pillar layer crosses the first conductive layers, and includes silicon single crystal. The second conductive layer is provided on the pillar layer and includes silicon single crystal containing impurities. The first conductive layers are provided between the circuitry layer and the second conductive layer.Type: ApplicationFiled: September 6, 2018Publication date: September 26, 2019Applicant: Toshiba Memory CorporationInventors: Shuto YAMASAKA, Tomonori AOYAMA
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Patent number: 10403642Abstract: A semiconductor device includes a semiconductor layer, a first conductive layer, a tunneling insulating film, and a charge trapping film. The tunneling insulating film is provided between the semiconductor layer and the first conductive layer. The charge trapping film is provided between the first conductive layer and the tunneling insulating film. The charge trapping film includes a first separation layer, a first trapping layer, and a second trapping layer. The first trapping layer is positioned between the tunneling insulating film and the first separation layer. The second trapping layer is positioned between the first conductive layer and the first separation layer. A trapping efficiency of charge in the first trapping layer is higher than a trapping efficiency of charge in the second trapping layer.Type: GrantFiled: August 7, 2018Date of Patent: September 3, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazuhiro Matsuo, Akiko Sekihara, Akira Takashima, Tomonori Aoyama, Tatsunori Isogai, Masaki Noguchi
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Publication number: 20190164742Abstract: In one embodiment, a method of manufacturing a semiconductor device includes alternately forming a plurality of first films and a plurality of second films on a substrate, and forming an opening in the first and second films. The method further includes sequentially forming a first insulator, a charge storage layer, a second insulator and a semiconductor layer on surfaces of the first and second films in the opening. The second insulator includes a silicon oxynitride film, and the silicon oxynitride film is formed using a first gas that includes silicon and a first element, a second gas that includes oxygen and nitrogen, and a third gas that includes a second element that reacts with the first element.Type: ApplicationFiled: September 6, 2018Publication date: May 30, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Masaki NOGUCHI, Tatsunori ISOGAI, Tomonori AOYAMA
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Publication number: 20190139981Abstract: A semiconductor device includes a semiconductor layer, a first conductive layer, a tunneling insulating film, and a charge trapping film. The tunneling insulating film is provided between the semiconductor layer and the first conductive layer. The charge trapping film is provided between the first conductive layer and the tunneling insulating film. The charge trapping film includes a first separation layer, a first trapping layer, and a second trapping layer. The first trapping layer is positioned between the tunneling insulating film and the first separation layer. The second trapping layer is positioned between the first conductive layer and the first separation layer. A trapping efficiency of charge in the first trapping layer is higher than a trapping efficiency of charge in the second trapping layer.Type: ApplicationFiled: August 7, 2018Publication date: May 9, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Kazuhiro Matsuo, Akiko Sekihara, Akira Takashima, Tomonori Aoyama, Tatsunori Isogai, Masaki Noguchi
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Patent number: 9532409Abstract: In accordance with an embodiment, a microwave irradiation apparatus includes a chamber and a polarizing plate. The chamber is configured to accommodate a substrate and is provided with an introduction port to introduce the microwave applied to the substrate from a direction at an angle within a range of ±45 degrees to a direction horizontal to a surface of the substrate. The polarizing plate is installed between the introduction port and the substrate, and selectively transmits a microwave where an amplitude direction of a magnetic field or an electric field is vertical to the surface of the substrate.Type: GrantFiled: March 3, 2016Date of Patent: December 27, 2016Assignee: Kabushiki Kaisha ToshibaInventor: Tomonori Aoyama
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Publication number: 20160365353Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming a first film on an inner wall of a hole in a stack on a substrate, forming a polycrystalline silicon film on the first film, and conducting a thermal annealing treatment in an atmosphere of ozone or oxygen radical to reduce defects in an interface between the first film and the polycrystalline silicon film. In the stack second films and third films are repeatedly stacked on the substrate in this order more than once.Type: ApplicationFiled: January 27, 2016Publication date: December 15, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tomonori AOYAMA
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Patent number: 9466517Abstract: According to one embodiment, a microwave annealing apparatus is provided, including a housing shielding electromagnetic waves, a first electromagnetic wave source configured to apply a first electromagnetic wave into the housing, a second electromagnetic wave source configured to apply, into the housing, a second electromagnetic wave having a higher frequency than the first electromagnetic wave, a susceptor configured to hold a semiconductor substrate, made of a material transparent to the first electromagnetic wave and provided in the housing, a temperature measuring device configured to measure the temperature of the semiconductor substrate, and a control unit configured to control the power of each of the first and second electromagnetic wave sources in accordance with the temperature measured by the temperature measuring device.Type: GrantFiled: April 9, 2013Date of Patent: October 11, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Ohno, Tomonori Aoyama, Kiyotaka Miyano, Yoshinori Honguh, Masataka Shiratsuchi
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Patent number: 9449848Abstract: According to one embodiment, the manufacturing method for the semiconductor device according to the embodiment includes carrying out ion implantation to the semiconductor layer and forming an amorphous layer on the surface of the semiconductor layer, and a heat treatment process using microwave annealing at a temperature higher than or equal to 200° C. and lower than or equal to 700° C. and single crystallizes the amorphous layer.Type: GrantFiled: August 29, 2013Date of Patent: September 20, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kiyotaka Miyano, Wakana Kai, Tatsunori Isogai, Tomonori Aoyama
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Publication number: 20160268283Abstract: According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode layers; a first electrode layer included in the plurality of electrode layers; a second electrode layer included in the plurality of electrode layers; a first insulating layer provided between the first electrode layer and the second electrode layer, and provided in contact with the first electrode layer and the second electrode layer; a semiconductor portion; a charge storage film; a first conductive film; and second conductive film. The first conductive film is provided between the first electrode layer and the charge storage film, and provided in contact with the first insulating layer. The second conductive film is provided between the second electrode layer and the charge storage film, and provided in contact with the first insulating layer.Type: ApplicationFiled: July 9, 2015Publication date: September 15, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Masayuki KITAMURA, Atsuko Sakata, Satoshi Wakatsuki, Takeshi Ishizaki, Daisuke Ikeno, Junichi Wada, Kei Watanabe, Shinya Okuda, Hirotaka Ogihara, Hiroshi Nakazawa, Tomonori Aoyama, Kenji Aoyama, Hideaki Aochi
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Patent number: 9257299Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a resist and a layer to be etched on a substrate, forming a non-cured layer on the resist by supplying a metal compound containing Ru, forming a cured layer on a surface layer of the resist by using the non-cured layer, and etching the layer to be etched by reactive ion etching using the cured layer and the resist as a mask.Type: GrantFiled: February 27, 2014Date of Patent: February 9, 2016Assignee: Kabushiki Kaisha ToshibaInventor: Tomonori Aoyama
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Publication number: 20150380301Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a plurality of convex portions on a substrate, forming a first film on upper faces and side faces of the convex portions, and forming a second film on the upper faces and the side faces of the convex portions via the first film. The method further includes removing the second film formed on upper faces of the first film to expose the upper faces of the first film. The method further includes implanting impurities into the convex portions in a state where side faces of the first film are covered with the second film and the upper faces of the first film are exposed. The method further includes annealing the convex portions after implanting the impurities into the convex portions.Type: ApplicationFiled: February 10, 2015Publication date: December 31, 2015Inventor: Tomonori AOYAMA
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Publication number: 20150311090Abstract: A method for manufacturing a semiconductor device includes forming a first layer above a semiconductor substrate, implanting in a surface of the first layer, at least one kind of ions of an element contained in the first layer, and applying microwave to the first layer in which at least one kind of the ions are implanted.Type: ApplicationFiled: March 3, 2015Publication date: October 29, 2015Inventors: Tatsunori ISOGAI, Tomonori AOYAMA
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Publication number: 20150263033Abstract: In a manufacturing method of a semiconductor device according to an embodiment, a stacked structure constituted by an electrode, an insulation film, and an amorphous thin film is formed. A microwave of a first frequency is irradiated to the stacked structure so as to selectively heat the electrode. Thereby a seed crystal is formed in a part of the amorphous thin film adjacent to the electrode. A microwave of a second frequency that is different from the first frequency is irradiated to the stacked structure so as to grow the seed crystal. Thereby a polycrystalline thin film is formed.Type: ApplicationFiled: September 10, 2014Publication date: September 17, 2015Inventor: Tomonori AOYAMA