Abstract: A semiconductor wafer and a method for forming a semiconductor. The semiconductor wafer includes: a first semiconductor component having a first device; a second semiconductor component having a second device; an insulation layer laterally extending to the first semiconductor component and the second semiconductor component; and a grind layer configured on or adjacent to a backside of the semiconductor wafer. Therefore, chipping or cracking can be decreased or avoided when the grind layer is exposed during the thinning process (such as backside grinding).

Abstract: A semiconductor wafer and a method for forming a semiconductor. The semiconductor wafer includes: a first semiconductor component having a first device; a second semiconductor component having a second device; an insulation layer laterally extending to the first semiconductor component and the second semiconductor component; and a grind layer configured on or adjacent to a backside of the semiconductor wafer. Therefore, chipping or cracking can be decreased or avoided when the grind layer is exposed during the thinning process (such as backside grinding).

Abstract: A semiconductor device and a method for detecting a crack of the semiconductor device are provided. The semiconductor device includes a crack sensor having a SBD structure; the SBD structure at least is configured on a first side of a semiconductor body and configured to detect a crack on the first side of the semiconductor body. Therefore, a crack on the surface of the semiconductor device can be detected by the crack sensor with high precision and simple structure.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide drift layer, a buried silicon carbide layer and an oxide semiconductor layer; the buried silicon carbide layer is located within the silicon carbide drift layer and the buried silicon carbide layer is covered by the oxide semiconductor layer. Therefore, breakdown behavior and/or long-time reliability of the semiconductor device may be further improved.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide drift layer, a buried silicon carbide layer and an oxide semiconductor layer; the buried silicon carbide layer is located within the silicon carbide drift layer and the buried silicon carbide layer is covered by the oxide semiconductor layer. Therefore, breakdown behavior and/or long-time reliability of the semiconductor device may be further improved.

Abstract: Provided is a highly reliable semiconductor device that uses a thick passivation layer. The protective film is formed so as to cover mostly the entire surface of a semiconductor substrate, and is open only in an area of part that is above a metal wiring layer (connection area). The passivation layer includes starting from the bottom side, a first silicon nitride film that includes silicon nitride (Si3N4), a silicon oxide film that includes silicon oxide (SiO2), and an organic film (organic layer) that includes a polyimide. The silicon oxide film and organic film are formed so as to cover the electrode layer (metal wiring layer) except the top of the insulation layer and the connection area, however, the first silicon nitride film is formed only on the insulation layer and not formed on the electrode layer.

Abstract: A semiconductor device includes a semiconductor substrate, which includes: a drift region that has a first conductivity type; a body region that has a second conductivity type and is formed on the drift region; and an impurity region that has the first conductivity type and is formed inward from a surface of the body region. The semiconductor device further includes a trench, which is formed on a front surface of the semiconductor substrate and reaches the drift region; a control electrode, which is formed in the trench; an oxide film, which is formed between an inner wall of the trench and the control electrode; an electrode, which is connected to the impurity region; and a transistor, which includes a nitride film formed on the front surface of the semiconductor substrate excluding an upper side of the control electrode and a formation position of the electrode, in the semiconductor substrate.

Abstract: A semiconductor device includes: a semiconductor substrate including: a drift region that has a first conductivity type; a body region that has a second conductivity type and is formed on the drift region; and an impurity region that has the first conductivity type and is formed in a surface of the body region; a trench, which reaches the drift region; an electric-field relaxation layer, which is formed on at least a portion of a bottom surface out of inner walls of the trench and is electrically connected to the impurity region; a control electrode, which is formed in the trench; an insulating film, which is formed between the control electrode and both the inner walls of the trench and the electric-field relaxation layer; and an electrode, which is connected to the impurity region.

Abstract: A semiconductor device includes a semiconductor substrate, which includes: a drift region that has a first conductivity type; a body region that has a second conductivity type and is formed on the drift region; and an impurity region that has the first conductivity type and is formed inward from a surface of the body region. The semiconductor device further includes a trench, which is formed on a front surface of the semiconductor substrate and reaches the drift region; a control electrode, which is formed in the trench; an oxide film, which is formed between an inner wall of the trench and the control electrode; an electrode, which is connected to the impurity region; and a transistor, which includes a nitride film formed on the front surface of the semiconductor substrate excluding an upper side of the control electrode and a formation position of the electrode, in the semiconductor substrate.

Abstract: A semiconductor device includes a semiconductor base body having a first main surface and a second main surface, the first main surface and the second main surface being opposite with each other; a Schottky electrode that is disposed on the first main surface and forms a Schottky junction with the semiconductor base body; and a barrier metal layer that is brought into ohmic contact with the first main surface around the Schottky electrode and covers a side surface of the Schottky electrode.

Abstract: Provided is a semiconductor device that is good in switching characteristics and high in breakdown voltage in off state. The geometry of a corner of a trench T is provided with a rounded shape (a curved face geometry having a radius of curvature of R1) under the depth P1. In addition, assuming the thickness of a gate oxide film 21 on the side wall of the trench T in a right-left direction in figure is T0, and the thickness of the gate oxide film 21 in the central portion of the bottom part of the trench T in a vertical direction in figure is T1, the gate oxide film 21 is formed so as to meet T1>T0. The gate oxide film 21 is provided with a rounded shape (having a radius of curvature of R2) under the depth P2. In addition, the expression R2?R1 is met.

Abstract: A semiconductor device of trench gate type is provided that has achieved both large on-current and high off-state breakdown voltage. Around trench T and between it and electric field relaxation p-layer 16, low resistance n-layer 17 is provided. Low resistance n-layer 17 is formed deeper than trench T, and shallower than electric field relaxation p-layer 16, being connected to n?-layer (drift layer) 12 just thereunder, and thus low resistance n-layer 17 and n?-layer 12 are integrated to form a drift layer. Although low resistance n-layer 17 is n-type as is n?-layer 12, donor concentration thereof is set higher than that of n?-layer 12, thereby low resistance n-layer 17 having a resistivity lower than that of n?-layer 12. This low resistance n-layer 17 is provided in on-current path (between electric field relaxation p-layer 16 and trench T), whereby low resistance n-layer 17 can lower the resistance to on-current.