Patents by Inventor Tomonori Kitakura

Tomonori Kitakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100203806
    Abstract: A semiconductor manufacturing apparatus comprising a platen holding a polishing pad; a polishing head including a pressurizing mechanism which presses a surface of a processing target substrate onto the polishing pad; and a plurality of temperature adjusters being provided in the platen in a radial direction of the platen and being capable of adjusting temperatures thereof independently from one another, wherein, when the surface of the processing target substrate is polished by rotating the platen and the polishing head, the temperatures of the temperature adjusters are changed, so that temperature adjustment can be performed selectively on a region ranging on the surface of the processing target substrate in a radial direction thereof.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 12, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomonori KITAKURA, Dai FUKUSHIMA, Keiji FUJITA
  • Patent number: 5607878
    Abstract: An inter-level insulation film is formed on a first-level interconnection layer and part of the inter-level insulation film which lies on the first-level interconnection layer is etched to form a contact hole. After a natural oxidation film formed on the surface of part of the first-level interconnection layer which is exposed in the contact hole is removed, the resultant structure is exposed to a gas atmosphere containing halogen to purify the surface of the inter-level insulation film. After this, a contact plug is deposited and formed on the first-level interconnection layer which is exposed in the contact hole by the selective CVD method to fill in the contact hole. A second-level interconnection layer is formed on the inter-level insulation film and the first-level and second-level interconnection layers are electrically connected to each other via the contact plug.
    Type: Grant
    Filed: September 12, 1995
    Date of Patent: March 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mari Otsuka, Tomonori Kitakura, Kenichi Otsuka, Kazuya Mori