Patents by Inventor Tomonori Terada

Tomonori Terada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060267190
    Abstract: A method according to the present invention for producing a semiconductor device includes the step of forming a connecting electrode for allowing connection with an outside electrode. The step includes the sub-steps of (i) forming, in a silicon substrate, a concave section whose inner wall is covered by a conductive layer, (ii) filling the concave section with a filler made of a material different from a material of the conductive layer, and (iii) exposing the conductive layer from a bottom surface of the silicon substrate. As a result, it is possible to speedily produce a semiconductor device favorably applicable to a laminated semiconductor device.
    Type: Application
    Filed: May 23, 2006
    Publication date: November 30, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tomonori Terada, Toshihisa Gotoh