Patents by Inventor Tomonori Ueyama

Tomonori Ueyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10985289
    Abstract: A solar cell includes a crystalline silicon substrate, a P-doped silicon oxide layer that is formed on a principal surface of the crystalline silicon substrate and that includes phosphorus as an impurity, and an amorphous silicon layer that includes an intrinsic amorphous silicon layer and a p-type amorphous silicon layer. The intrinsic amorphous silicon layer is formed on the P-doped silicon oxide layer. The p-type amorphous silicon layer is formed on the intrinsic amorphous silicon layer and includes a p-type dopant. The intrinsic amorphous silicon layer includes the p-type dopant. The concentration of the p-type dopant in the thickness direction of the intrinsic amorphous silicon layer has a profile higher than the concentration of the p-type dopant at the interface between the P-doped silicon oxide layer and the intrinsic amorphous silicon layer.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: April 20, 2021
    Assignee: PANASONIC CORPORATION
    Inventor: Tomonori Ueyama
  • Publication number: 20200313019
    Abstract: A solar cell includes a crystalline silicon substrate, a P-doped silicon oxide layer that is formed on a principal surface of the crystalline silicon substrate and that includes phosphorus as an impurity, and an amorphous silicon layer that includes an intrinsic amorphous silicon layer and a p-type amorphous silicon layer. The intrinsic amorphous silicon layer is formed on the P-doped silicon oxide layer. The p-type amorphous silicon layer is formed on the intrinsic amorphous silicon layer and includes a p-type dopant. The intrinsic amorphous silicon layer includes the p-type dopant. The concentration of the p-type dopant in the thickness direction of the intrinsic amorphous silicon layer has a profile higher than the concentration of the p-type dopant at the interface between the P-doped silicon oxide layer and the intrinsic amorphous silicon layer.
    Type: Application
    Filed: March 23, 2020
    Publication date: October 1, 2020
    Inventor: Tomonori UEYAMA
  • Patent number: 10014432
    Abstract: Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers (11, 13).
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: July 3, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Tomonori Ueyama, Motohide Kai, Masaki Shima
  • Publication number: 20160181461
    Abstract: Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers (11, 13).
    Type: Application
    Filed: February 25, 2016
    Publication date: June 23, 2016
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Tomonori UEYAMA, Motohide KAI, Masaki SHIMA
  • Publication number: 20140162394
    Abstract: Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers (11, 13).
    Type: Application
    Filed: November 26, 2013
    Publication date: June 12, 2014
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Motohide Kai, Tomonori Ueyama, Masaki Shima
  • Publication number: 20130344247
    Abstract: A configuration is provided for a deposition device using the catalytic CVD method which reduces problems associated with extension of the catalyst and is superior in terms of running costs and productivity. The configuration provides a chamber 1 able to maintain reduced interior pressure; a source gas introducing route 32, 33a for introducing source gas into the chamber; a catalyst 4 of tantalum wire having a boride layer on the surface and provided inside the chamber 1 so as to allow the source gas introduced via the source gas introducing route to come into contact with the surface of the catalyst; a gas introducing route 36, 33b for introducing boron-containing gas to the chamber 1 for the reformation of the boride layer on the surface of the catalyst 4; and a power supply unit 5 for applying energy to the catalyst 4 to maintain the catalyst at a predetermined temperature.
    Type: Application
    Filed: August 28, 2013
    Publication date: December 26, 2013
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Tomonori Ueyama, Motohide Kai