Abstract: A display apparatus includes an addition section, a conversion section, and a control section. The addition section adds a dither signal to a digital image signal for each of a plurality of color components, the digital image signal being generated on a basis of each of the plurality of color components different from each other, and inputted in predetermined order for each sub-frame included in a frame. The conversion section performs digital to analog conversion of converting the digital image signal to which the dither signal is added into an analog image signal. The control section controls a pattern of the dither signal, at each predetermined cycle including a plurality of the sub-frames, depending on the order in which the digital image signal for each of the color components is inputted, within the frame.

Abstract: [Object] To enable an image to be displayed in a more suitable manner, in a case where color sequential drive is adopted. [Solution] A display apparatus includes: an addition section that adds a dither signal to a digital image signal for each of a plurality of color components, the digital image signal being generated on a basis of each of the plurality of color components different from each other, and inputted in predetermined order for each sub-frame included in a frame; a conversion section that performs digital to analog conversion of converting the digital image signal to which the dither signal is added into an analog image signal; and a control section that controls a pattern of the dither signal, at each predetermined cycle including a plurality of the sub-frames, depending on the order in which the digital image signal for each of the color components is inputted, within the frame.

Abstract: There is provided a driving circuit driving pixels each including an electro-optical device and a memory, in a display. The driving circuit includes: a dividing section dividing one frame period into subblocks composed of subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits; and an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing an electro-optical device of the pixel into an on state or an off state according to a corresponding bit in each of the subfields. On a subblock by subblock basis, the ON-OFF period control section selects scan lines whose number is less by one than a number of the subfields included in a relevant subblock, and again selects one of the selected scan lines during a same subblock period.

Abstract: A display method includes: performing display by driving a display pixel at a drive interval that conforms to a weight of each bit in a gray-scale code that includes the bits; and so correcting the drive interval, the gray-scale code, or both of the drive interval and the gray-scale code as to change a luminance of the display pixel smoothly.

Abstract: A drive circuit includes: a division section that divides one frame period into a subfields, and divides each of one or more of the subfields to generate division subfields; a correction section that corrects, when bit arrays of the gray-scale data corresponding to respective two pixels next to each other are different from one another, the bit array of the gray-scale data corresponding to a first pixel of the two pixels to bring this bit array closer to the bit array of the gray-scale data corresponding to a second pixel of the two pixels, while maintaining gray-scale; and an ON-OFF-period control section that controls a ratio of an ON period or an OFF period to the one frame period, by turning on or off a liquid crystal cell of each of pixels according to the bit corresponding to each of the subfields and each of the division subfields.

Abstract: A liquid crystal display includes: a display section including a plurality of pixels and displaying an image through varying a gray scale of each of the pixels based on an image signal; a detection section detecting, based on the image signal, variations in gray scales of a first pixel and a second pixel which are adjacent to each other; and a control section performing control, based on a detection result of the detection section, to allow one of the first and second pixels to be maintained in black state of display for a predetermined period.

Abstract: A display apparatus includes a display panel, a panel substrate including a data line driver, a controller connected to the panel substrate, and a connection unit provided in the panel substrate. The controller selects M signal lines from N signal lines (M is a natural number satisfying M?N) in accordance with a frame rate of a video data, and transmits M-phase video data to the panel substrate via the selected M signal lines. The data line driver controls the switching circuits of the connection unit in accordance with the frame rate of the video data to connect the M signal lines via which the video data is transmitted, to the data lines, and sequentially selects the M data lines to supply each piece of the video data transmitted via the M signal lines to each pixel connected to the selected M data lines.

Abstract: A display device includes: a pixel array unit including a plurality of scanning lines and a plurality of signal lines; a scanning line driving unit that sequentially applies a driving voltage to the plurality of scanning lines according to a shift timing indicated by a shift clock; a signal line driving unit that drives the plurality of signal lines on the basis of an input video signal, and a clock adjusting unit that adjusts the shift clock such that there are n (n is a natural number equal to or greater than 2) shift timings within each one horizontal line period for which an image signal corresponding to one horizontal line is displayed.

Abstract: A display method includes: performing display by driving a display pixel at a drive interval that conforms to a weight of each bit in a gray-scale code that includes the bits; and so correcting the drive interval, the gray-scale code, or both of the drive interval and the gray-scale code as to change a luminance of the display pixel smoothly.

Abstract: A drive circuit includes: a control section generating address information by which a horizontal line to be driven in a display section is designated, the display section including a plurality of display pixels; and a driving section driving, at a drive interval that conforms to a weight of each bit in a gray-scale code that includes the bits, the display pixels based on a value of each of the bits, within a unit driving period that is set to drive the horizontal line designated by the address information. The control section sets a start timing of the unit driving period on an optional basis.

Abstract: A liquid crystal display includes: a display section including a plurality of pixels and displaying an image through varying a gray scale of each of the pixels based on an image signal; a detection section detecting, based on the image signal, variations in gray scales of a first pixel and a second pixel which are adjacent to each other; and a control section performing control, based on a detection result of the detection section, to allow one of the first and second pixels to be maintained in black state of display for a predetermined period.

Abstract: A drive circuit includes: a division section that divides one frame period into a subfields, and divides each of one or more of the subfields to generate division subfields; a correction section that corrects, when bit arrays of the gray-scale data corresponding to respective two pixels next to each other are different from one another, the bit array of the gray-scale data corresponding to a first pixel of the two pixels to bring this bit array closer to the bit array of the gray-scale data corresponding to a second pixel of the two pixels, while maintaining gray-scale; and an ON-OFF-period control section that controls a ratio of an ON period or an OFF period to the one frame period, by turning on or off a liquid crystal cell of each of pixels according to the bit corresponding to each of the subfields and each of the division subfields.

Abstract: There is provided a driving circuit driving pixels in a display, the pixels each including a liquid crystal cell and a memory. The driving circuit includes: a dividing section dividing one frame period into subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits; a correction section correcting, when bit sequences of two sets of gray-scale data corresponding to two pixels adjacent to each other differ from each other, gray-scale data having a higher gray-scale level out of the two set of gray-scale data, to further increase the gray-scale level thereof; and an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing the liquid crystal cell of the pixel into an on state or an off state according to a corresponding bit in each of the subfields.

Abstract: There is provided a driving circuit driving pixels each including an electro-optical device and a memory, in a display. The driving circuit includes: a dividing section dividing one frame period into subblocks composed of subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits; and an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing an electro-optical device of the pixel into an on state or an off state according to a corresponding bit in each of the subfields. On a subblock by subblock basis, the ON-OFF period control section selects scan lines whose number is less by one than a number of the subfields included in a relevant subblock, and again selects one of the selected scan lines during a same subblock period.

Abstract: A drive circuit includes: a division section and an ON-OFF-period control section. The division section divides one frame period into a plurality of subfields, and divides each of one or more of the plurality of subfields to generate a plurality of division subfields. Each of the subfields corresponds to each bit of gray-scale data and has a period corresponding to a weight of the corresponding bit, and each of the one or more of the subfields has the period that is relatively long and is divided into periods each equal to the period of the subfield that is relatively short. The ON-OFF-period control section controls a ratio of an ON period or an OFF period to the one frame period, by turning on or off an electro-optical device of each pixel according to the bit corresponding to each of the subfields and each of the division subfields.

Abstract: A display device includes: a pixel array unit including a plurality of scanning lines and a plurality of signal lines; a scanning line driving unit that sequentially applies a driving voltage to the plurality of scanning lines according to a shift timing indicated by a shift clock; a signal line driving unit that drives the plurality of signal lines on the basis of an input video signal, and a clock adjusting unit that adjusts the shift clock such that there are n (n is a natural number equal to or greater than 2) shift timings within each one horizontal line period for which an image signal corresponding to one horizontal line is displayed.

Abstract: A display apparatus includes a display panel, a panel substrate including a data line driver, a controller connected to the panel substrate, and a connection unit provided in the panel substrate. The controller selects M signal lines from N signal lines (M is a natural number satisfying M?N) in accordance with a frame rate of a video data, and transmits M-phase video data to the panel substrate via the selected M signal lines. The data line driver controls the switching circuits of the connection unit in accordance with the frame rate of the video data to connect the M signal lines via which the video data is transmitted, to the data lines, and sequentially selects the M data lines to supply each piece of the video data transmitted via the M signal lines to each pixel connected to the selected M data lines.

Abstract: A display device having extremely short writing time to a pixel such as the liquid crystal display device of a dot sequential drive method using a single-crystal silicon transistor as a switching element is provided in which in the case where a display area is divided into two or more areas, the degradation of picture quality is prevented to perform a high definition display.