Patents by Inventor Tomoshi Ohde
Tomoshi Ohde has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7880317Abstract: A semiconductor device is provided in which the heat dissipation characteristic of a flip-chip mounted semiconductor chip is improved. A semiconductor device is provided with a substrate, a semiconductor flip-chip mounted on the substrate, a sealing resin layer for sealing around the semiconductor flip-chip. A sealing resin layer for sealing the semiconductor chip is formed around the semiconductor chip. In this semiconductor device, the back surface of the semiconductor chip is exposed and is convex with respect to the upper surface of the sealing resin layer.Type: GrantFiled: October 30, 2006Date of Patent: February 1, 2011Assignees: Sony Corporation, Sony Computer Entertainment Inc.Inventors: Tomoshi Ohde, Fujio Kanayama, Mitsuru Adachi, Tetsunori Niimi, Hidetoshi Kusano, Yuji Nishitani
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Publication number: 20090302450Abstract: A semiconductor device is provided in which the heat dissipation characteristic of a flip-chip mounted semiconductor chip is improved. A semiconductor device is provided with a substrate, a semiconductor flip-chip mounted on the substrate, a sealing resin layer for sealing around the semiconductor flip-chip. A sealing resin layer for sealing the semiconductor chip is formed around the semiconductor chip. In this semiconductor device, the back surface of the semiconductor chip is exposed and is convex with respect to the upper surface of the sealing resin layer.Type: ApplicationFiled: October 30, 2006Publication date: December 10, 2009Applicants: SONY CORPORATION, SONY COMPUTER ENTERTAINMENT INCInventors: Tomoshi Ohde, Fujio Kanayama, Mitsuru Adachi, Tetsunori Nimi, Hidetoshi Kusano, Yuji Nashitani
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Patent number: 7436682Abstract: A flip chip mounting method for improving the accuracy of positioning of a semiconductor chip and avoiding a short circuit between protruding electrodes even when the protruding electrodes are formed at smaller spacings. The method comprises: placing a semiconductor chip on a wiring board, the semiconductor chip having protruding electrodes formed at a relatively small spacing and at a relatively large spacing, the wiring board having electrode pads corresponding to the respective protruding electrodes and solder pieces formed on the respective pads; heating the semiconductor chip and the wiring board to a temperature at which only the solder pieces on the electrode pads of greater spacing melt; performing self alignment of the semiconductor chip by the melted solder pieces; and heating the semiconductor chip and the wiring board further to a temperature at which the protruding electrodes and the solder pieces on the electrode pads of smaller spacing melt.Type: GrantFiled: November 16, 2006Date of Patent: October 14, 2008Assignees: Sony Computer Entertainment Inc., Sony CorporationInventors: Yuji Nishitani, Tomoshi Ohde
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Publication number: 20080185712Abstract: A semiconductor device is provided in which the effect of the heat generated by a flip-chip mounted semiconductor on resin is suppressed. The semiconductor device includes: a substrate; a semiconductor chip which is mounted on the substrate with a front surface of the semiconductor chip facing downward; and a molding resin layer provided on a semiconductor chip-mounted surface of the substrate so as to be spaced apart from the semiconductor chip and to surround the semiconductor chip. In addition, the upper surface of the molding resin layer is positioned higher than the rear surface of the semiconductor chip.Type: ApplicationFiled: January 3, 2008Publication date: August 7, 2008Applicants: SONY CORPORATION, SONY COMPUTER ENTERTAINMENT INC.Inventors: Fujio Kanayama, Tomoshi Ohde, Mitsuru Adachi, Tetsunori Niimi, Hidetoshi Kusano, Yuji Nishitani
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Publication number: 20070290310Abstract: The heat dissipation characteristics of a semiconductor device having a flip-chip mounted semiconductor chip are improved at low costs. The semiconductor device includes: a substrate; the semiconductor chip which is flip-chip mounted on the substrate with the front surface of the chip facing downward; a sealing resin layer which is molded around the semiconductor chip; a phase change portion which is provided on the rear surface of the semiconductor chip so as to be capable of being thermally connected to a heat dissipation member such as a heat sink or a heat pipe. The phase change portion is melted by the operating heat of the semiconductor chip. Therefore, the intimate characteristics between the semiconductor chip and the heat dissipation member are improved, and the heat dissipation characteristics of the semiconductor chip are improved.Type: ApplicationFiled: May 24, 2007Publication date: December 20, 2007Applicants: SONY CORPORATION, SONY COMPUTER ENTERTAINMENT INC.Inventors: Hidetoshi KUSANO, Tomoshi OHDE
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Publication number: 20070119618Abstract: A flip chip mounting method for improving the accuracy of positioning of a semiconductor chip and avoiding a short circuit between protruding electrodes even when the protruding electrodes are formed at smaller spacings. The method comprises: placing a semiconductor chip on a wiring board, the semiconductor chip having protruding electrodes formed at a relatively small spacing and at a relatively large spacing, the wiring board having electrode pads corresponding to the respective protruding electrodes and solder pieces formed on the respective pads; heating the semiconductor chip and the wiring board to a temperature at which only the solder pieces on the electrode pads of greater spacing melt; performing self alignment of the semiconductor chip by the melted solder pieces; and heating the semiconductor chip and the wiring board further to a temperature at which the protruding electrodes and the solder pieces on the electrode pads of smaller spacing melt.Type: ApplicationFiled: November 16, 2006Publication date: May 31, 2007Inventors: Yuji Nishitani, Tomoshi Ohde
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Patent number: 6838368Abstract: In a semiconductor device, a plurality of wiring films are formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material is embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element is positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to said front surface of the base; wires bond the electrodes of the semiconductor element to the corresponding wiring films; and a resin seals the wiring films and the wires.Type: GrantFiled: November 10, 2000Date of Patent: January 4, 2005Assignee: Sony CorporationInventors: Kenji Ohsawa, Tomoshi Ohde
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Patent number: 6514847Abstract: In a semiconductor device, a plurality of wiring films are formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material is embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element is positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to said front surface of the base; wires bond the electrodes of the semiconductor element to the corresponding wiring films; and a resin seals the wiring films and the wires.Type: GrantFiled: July 25, 2000Date of Patent: February 4, 2003Assignee: Sony CorporationInventors: Kenji Ohsawa, Tomoshi Ohde
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Patent number: 6368943Abstract: On the scribe line area formed between a plurality of semiconductor clip areas on a semiconductor wafer, there is provided a chipping prevention portion constituted by a double groove consisting of the first and second grooves. Thus, the entry of chipping into the semiconductor chip area is prevented when dicing the semiconductor wafer along the scribe line area provided between each of the semiconductor chip areas. In this respect, an insulating film may be formed on the surface of the semiconductor wafer on the side of an element forming area.Type: GrantFiled: May 12, 2000Date of Patent: April 9, 2002Assignee: Sony CorporationInventors: Tomoshi Ohde, Yukio Asami, Hirotaka Kobayashi
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Patent number: 6326676Abstract: On the scribe line area formed between a plurality of semiconductor chip areas on a semiconductor wafer, there is provided a chipping preventing portion constituted by a double groove consisting of the first and second grooves. Thus, the entry of chipping into the semiconductor chip area is prevented when dicing the semiconductor wafer along the scribe line area provided between each of the semiconductor chip areas. In this respect, an insulating film may be formed on the surface of the semiconductor wafer on the side of an element forming area.Type: GrantFiled: May 12, 1997Date of Patent: December 4, 2001Assignee: Sony CorporationInventors: Tomoshi Ohde, Yukio Asami, Hirotaka Kobayashi
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Publication number: 20010005050Abstract: In a semiconductor device, a plurality of wiring films are formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material is embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element is positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to said front surface of the base; wires bond the electrodes of the semiconductor element to the corresponding wiring films; and a resin seals the wiring films and the wires.Type: ApplicationFiled: November 25, 1998Publication date: June 28, 2001Inventors: KENJI OHSAWA, TOMOSHI OHDE
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Patent number: 6020626Abstract: A semiconductor device is provided which can improve a heat radiation characteristic of the package, and also can solve an uniform characteristic of ball sizes when a projection electrode such as soldering balls is formed by way of the electrolytic plating method. A semiconductor device is comprised of: a semiconductor chip in having a plurality of electrode pads and an inside of a pad forming region thereof used as an effective element region; a reinforcement plate provided under such a condition that this semiconductor chip is surrounded by the reinforcement plate; a plurality of leads constituted by an outer lead and an inner lead, in which a projection electrode is provided on the outer lead, and also a tip portion of the inner lead is connected to the electrode pads sealing resin filled into a peripheral region of the semiconductor chip.Type: GrantFiled: September 18, 1998Date of Patent: February 1, 2000Assignee: Sony CorporationInventors: Kenji Ohsawa, Tomoshi Ohde